Mapping Table Error Correction in Non-Volatile Memory
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Solution Overview
Problem
Non-volatile memory systems, particularly SSDs, face challenges in detecting and correcting bit flips in cached mapping table data without a dedicated ECC engine, which can lead to errors in data access and storage.
Innovation Solution
A method and system where the controller generates and regenerates error correction data for mapping entries, inverts bits to create revised entries, and tests these alternatives to ensure accurate data retrieval and storage, effectively correcting bit flips without relying on dedicated hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dedicated ECC engine is used for real-time error detection and correction, then reliability is improved, but device complexity and cost increase
Solution Approach 1:
The mapping table cache performs self-diagnosis and self-correction by using its own storage structure to detect and correct bit flips. The system generates alternative versions of mapping entries with inverted bits and uses the existing valid entry to identify and correct errors without external assistance, making the cache self-sufficient for error handling.
Solution Approach 2:
The system pre-generates alternative versions of mapping table entries by inverting individual bits during the write operation. These alternative versions are stored alongside the original entry, so that when an error occurs, the correct alternative is already available for immediate use without requiring complex real-time analysis.
2Reliability
If bit flip protection is implemented for mapping table data, then data integrity is improved, but processing time and complexity increase
Solution Approach 1:
Alternative mapping entry versions are generated in advance during the write operation, not during read operations. This preliminary action ensures that when reading, the system only needs to compare the retrieved entry against pre-generated alternatives, significantly reducing the time required for error detection and correction.
Solution Approach 2:
The error protection mechanism is applied at the granularity of individual mapping table entries rather than requiring system-wide error checking. Each entry is independently protected with its own alternative versions, allowing parallel processing and reducing overall processing time while maintaining data integrity.
3Device complexity
If error correction is performed without a dedicated ECC engine, then device complexity is reduced, but measurement precision and error detection capability worsen
Solution Approach 1:
Instead of using complex ECC algorithms, the system creates simple binary copies of mapping entries with individual bits inverted. These copied alternatives are stored with the original entry, and error detection is performed by comparing the retrieved entry against its alternatives, achieving accurate error detection through simple comparison logic rather than complex mathematical operations.
Data Source
AI summary
A system and method is disclosed for detecting and correcting for errors in mapping table information stored in volatile memory of a non-volatile memory system. The method may include checking for mapping entry errors when retrieving mapping data for the non-volatile memory from a volatile memory cache. When an error is discovered, the method includes the processor generating a set of candidate mapping entries each having a different single bit difference from the mapping entry discovered to have an error. Each candidate is tested against one or more mapping data accuracy tests and, when one of the candidates is found to be a correct mapping entry based on the one or more tests, the original mapping table entry with the determined defect is replaced with the successful candidate mapping entry.