Mapping Table Segmentation for Limited DRAM Storage
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Solution Overview
Problem
Data storage devices with small-sized DRAM or SRAM face inefficiencies in managing and accessing data due to insufficient memory capacity to store entire mapping tables, necessitating an effective method to utilize limited memory resources.
Innovation Solution
Dividing the mapping table into sub-mapping tables, caching them in DRAM, and managing cache tables to efficiently read and replace sub-mapping tables as needed, allowing for improved data access and management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the entire mapping table is stored in DRAM/SRAM, then data access efficiency is improved, but memory capacity requirements increase
Solution Approach 1:
The mapping table is divided into multiple sub-mapping tables (e.g., first sub-mapping table, second sub-mapping table, etc.), each storing a portion of the mapping data. This segmentation allows the system to load only necessary portions into limited DRAM/SRAM capacity, resolving the contradiction between maintaining high data access efficiency and reducing memory capacity requirements.
2Productivity
If sub-mapping tables are cached in DRAM, then data management efficiency is improved, but cache management complexity increases
Solution Approach 1:
The system pre-loads sub-mapping tables into the DRAM cache before they are needed for data access operations. By performing this caching action in advance, the system improves data management efficiency during actual operations while the complexity is confined to the preliminary loading phase, rather than requiring complex real-time management mechanisms.
Data Source
AI summary
An operating method for a data storage device is provided. The operating method includes steps of: dividing a mapping table into a plurality of sub-mapping tables; receiving an access command comprising a data address and a command category; determining whether a target sub-mapping table corresponding to the data address has been cached, wherein the target sub-mapping table is one of the sub-mapping tables; and if false, reading and caching the target sub-mapping table from the sub-mapping tables.


