Modular SmallSat C&DH Architecture for Radiation Tolerance
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Solution Overview
Problem
Current commercial off-the-shelf (COTS) components for spacecraft Command and Data Handling (C&DH) systems face challenges in handling single event effects (SEE) and total ion dose (TID) radiation, requiring a radiation-tolerant and flexible design to ensure reliability and performance beyond existing capabilities.
Innovation Solution
A modular architecture for SmallSat C&DH hardware using a combination of robust radiation-tolerant and COTS components, featuring a reprogrammable field programmable gate array (FPGA) with a soft-core processor, error correction capabilities, and modular design to accommodate various configurations within a 1U CubeSat form factor, including a C&DH processor card and auxiliary card with analog circuitry and miniaturized components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If commercial off-the-shelf (COTS) components are used for C&DH systems, then cost is reduced, but radiation tolerance and reliability deteriorate
Solution Approach 1:
The system is divided into two distinct segments: radiation-tolerant components (FPGA, processor) for critical functions requiring high reliability, and COTS components for non-critical functions where cost is prioritized. This segmentation allows each segment to be optimized for its specific requirements while working together in an integrated system.
Solution Approach 2:
Different quality levels are applied to different parts of the system based on their functional requirements. Critical subsystems (command processing, data handling, flight software execution) use radiation-tolerant components with higher reliability, while less critical subsystems use cost-effective COTS components, creating a heterogeneous system with locally optimized quality.
2Reliability
If radiation tolerant components are used, then reliability is improved, but cost increases
Solution Approach 1:
The system is divided into two distinct segments: radiation-tolerant components (FPGA, processor) for critical functions requiring high reliability, and COTS components for non-critical functions where cost is prioritized. This segmentation allows each segment to be optimized for its specific requirements while working together in an integrated system.
Solution Approach 2:
Different quality levels are applied to different parts of the system based on their functional requirements. Critical subsystems (command processing, data handling, flight software execution) use radiation-tolerant components with higher reliability, while less critical subsystems use cost-effective COTS components, creating a heterogeneous system with locally optimized quality.
3Loss of time
If a fixed C&DH design is used, then development time is reduced, but adaptability to different mission configurations deteriorates
Solution Approach 1:
The C&DH system incorporates dynamic reconfigurability through the FPGA, which can be programmed with different flight software and configuration settings depending on the specific mission requirements. This allows the hardware platform to adapt its functionality dynamically without requiring physical redesign, achieving both rapid development and high adaptability.
Solution Approach 2:
The modular C&DH architecture with standardized interfaces and the reprogrammable FPGA creates a universal platform that can serve multiple mission types and configurations. The same hardware base can be adapted for different satellite bus types, mission durations, and operational requirements through software configuration rather than hardware redesign.
Data Source
AI summary
The present invention relates to a modular architecture for a resilient extensible SmallSat (MARES) command and data handling (C&DH) device used in a spacecraft, the modular architecture which conforms to a 1U CubeSat board area form factor, including: a C&DH processor card disposed on a backplane of the form factor; a C&DH processor card disposed on a backplane of the form factor; a fault tolerant field programmable gate array (FPGA) disposed on the C&DH processor card, the FPGA including an embedded fault tolerant memory controller, and a soft-core processor which runs core flight software on a real-time executive for a multiprocessor operating system; and a C&DH auxiliary card disposed on the backplane and used in conjunction with the C&DH processor card, to provide processing capability for the spacecraft, the auxiliary card which contains peripheral interface drivers and read electronics for monitoring a health and safety of the spacecraft.


