MASH Delta-Sigma Modulator for Expanded Fractional Input Range
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Solution Overview
Problem
Conventional delta-sigma modulators (DSM) with multi-stage noise shaping (MASH) circuits are limited to a fractional input range of 0 to 1-LSB, which restricts their ability to handle expanded input ranges, leading to increased time needed for divider changes, such as from 50 to 49.99, despite only a one LSB change.
Innovation Solution
The proposed solution involves an input circuit that level-shifts and scales the input signal, followed by a multi-stage noise shaping (MASH) circuit, and an output circuit that inversely scales and level-shifts the output, allowing the DSM to operate with an expanded fractional input range from -N to N-LSB, effectively handling a wider range while maintaining the MASH circuit's input within 0 to 1-LSB.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional MASH circuits are used with limited fractional input range (0 to 1-LSB), then the circuit complexity is low, but the adaptability to handle expanded input ranges is poor
Solution Approach 1:
The input circuit is segmented into multiple functional blocks: a first adder for level-shifting, a first multiplier for scaling, and a second adder for bias adjustment. This segmentation allows each block to handle a specific transformation, collectively enabling expanded fractional input range while maintaining manageable complexity through modular design.
Solution Approach 2:
The circuit transforms the input signal parameters through level-shifting (adding a bias value), scaling (multiplying by a factor), and re-biasing operations. These parameter changes convert an expanded fractional input range into the standard 0 to 1-LSB range that conventional MASH circuits can process, thereby improving adaptability without requiring fundamental circuit redesign.
2Adaptability or versatility
If the DSM handles expanded input ranges, then the flexibility for divider changes is improved, but the time required for divider changes increases
Solution Approach 1:
The input circuit performs preliminary level-shifting and scaling transformations on the fractional input signal before it reaches the MASH circuit. By pre-processing the signal to fit within the standard 0 to 1-LSB range, the system enables faster response to divider changes while maintaining flexibility to handle expanded input ranges, as the complex transformations are prepared in advance rather than computed in real-time during divider transitions.
3Productivity
If the fractional-N PLL uses conventional DSM architecture, then the device complexity is low, but the productivity for high-speed data communication is limited
Solution Approach 1:
The modified DSM architecture maintains compatibility with conventional MASH circuits while adding input/output conditioning circuits that enable expanded fractional input range handling. This multi-functionality allows the same DSM structure to serve both traditional and high-performance applications, improving productivity for high-speed data communication without completely redesigning the core MASH circuitry.
Data Source
AI summary
An example apparatus includes an input circuit including a first adder and a first multiplier, the first adder configured to level-shift an input signal by an amount and the first multiplier configured to multiply output of the adder by a factor. The apparatus further includes a multi-stage noise shaping (MASH) circuit having an input coupled to the first multiplier. The apparatus further includes an output circuit including a second multiplier and a second adder, the second multiplier configured to multiply output of the MASH circuit by a reciprocal of the factor and the second adder configured to level-shift output of the second multiplier by an inverse of the amount.