MASH Sigma-Delta Modulator Without Redundant Delay Elements
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-speed sigma delta modulators in digital radio processors face challenges with increased power consumption, area requirements, and noise due to the use of multiple delay elements in parallel pipeline stages, leading to higher latency and noise introduction in RF stages.
Innovation Solution
A multi-stage noise shaping sigma delta modulator design that eliminates redundant delay elements, allowing direct data and carry bit feeding between accumulators, reducing the number of necessary delay elements and thus minimizing power consumption, latency, and noise while optimizing area usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallel pipeline stages are used to process multiple data bits simultaneously, then throughput is improved, but the number of delay elements increases leading to increased latency
Solution Approach 1:
The patent merges the functionality of delay elements into the accumulator circuitry itself. The accumulators naturally provide the necessary delay function through their feedback paths, eliminating the need for separate delay elements. This combining of functions maintains parallel processing capability while removing redundant delay components that increased latency.
Solution Approach 2:
The patent extracts and removes delay elements from the parallel pipeline structure. By identifying that delay elements are redundant when accumulators are used, the design eliminates these components entirely from the data path, thereby reducing latency while preserving the parallel processing throughput.
2Reliability
If delay elements are added for bit alignment and synchronization, then synchronization is improved, but area requirement increases
Solution Approach 1:
The patent combines the synchronization function with the accumulator logic. The accumulators inherently provide the timing and alignment functions that would otherwise require separate delay elements. This integration achieves bit alignment and synchronization without adding extra area for dedicated delay circuits.
Solution Approach 2:
The patent removes delay elements from the design, extracting their synchronization function and relocating it to the accumulator feedback paths. This elimination of separate delay components directly reduces the area requirement while maintaining synchronization capability.
3Productivity
If additional circuit elements are used in sigma delta modulators, then processing capability is improved, but power consumption increases
Solution Approach 1:
The patent extracts and removes delay elements from the sigma delta modulator design. Since delay elements consume power, their elimination directly reduces overall power consumption while the accumulator-based architecture maintains the necessary processing capability for high-resolution data conversion.
Solution Approach 2:
The patent merges the delay function into the accumulator circuitry, eliminating the need for separate power-consuming delay elements. This functional integration maintains processing capability while reducing the total number of active circuit elements and their associated power consumption.
4Reliability
If delay elements are implemented in integrated circuit, then data synchronization is improved, but noise introduction to RF stages increases
Solution Approach 1:
The patent removes delay elements from the signal path. Since delay elements are sources of noise that can affect RF stages, their elimination directly reduces noise introduction while the accumulator-based synchronization method maintains data alignment without the harmful noise side effects.
Solution Approach 2:
The patent combines the synchronization function with the accumulation operation. This integration achieves data alignment without requiring separate delay elements that would introduce noise to the RF stages, thereby maintaining synchronization while reducing harmful noise generation.
Data Source
AI summary
A Multi-stage noise shaping Sigma Delta Modulator (MSDM) and method of processing data using the MSDM are disclosed. The MSDM is capable of operating at high radio frequencies and is characterized by low power consumption, reduced latency and noise and occupies less area in an integrated circuit.