Arithmetic Boolean Mask Conversion Hardware Logic
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Solution Overview
Problem
Existing cryptographic technologies face challenges in securely converting between arithmetic and Boolean random masking in hardware implementations, particularly in preventing power analysis attacks like Differential Power Analysis (DPA), where secure computation on the bit level is necessary but not adequately addressed by previous methods.
Innovation Solution
A method for secure conversion between arithmetic and Boolean random masking is developed, involving specific XOR and AND operations to ensure that the output of each logic gate is statistically independent of the input data, using a bit-based approach that can be directly implemented in hardware with standard logic gates, without requiring additional random masking bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If standard logic gates are used for mask conversion, then hardware implementation is simple, but power consumption leaks information about secret keys
Solution Approach 1:
The patent segments the mask conversion process into multiple intermediate steps, where each step processes only a portion of the data. This segmentation ensures that no single logic gate processes the complete secret key information, thereby preventing power analysis attacks while maintaining hardware implementability through systematic data division
Solution Approach 2:
The patent introduces intermediate random values as mediators in the mask conversion process. These intermediary random values are combined with the secret key data through XOR operations, creating masked intermediate results that do not leak power consumption patterns. The intermediaries act as buffers that preserve security while enabling the conversion between arithmetic and Boolean masking schemes
2Reliability
If additional random masking bits are used, then security against power analysis attacks is improved, but device complexity increases
Solution Approach 1:
The patent makes the random masking bits multi-functional by using them for both mask conversion and security protection simultaneously. The same random values serve dual purposes: enabling the arithmetic-to-Boolean mask conversion while also providing the randomness needed to prevent power analysis attacks, thereby avoiding the need for separate random bits and reducing overall device complexity
Solution Approach 2:
The patent changes the parameters of the masking scheme by dynamically adjusting the random values used in different conversion steps. By varying the random masking parameters according to the specific computational stage, the system achieves high security without requiring a fixed large number of random bits, optimizing the balance between security and complexity
3Object-affected harmful factors
If secure mask conversion is implemented, then power analysis attack resistance is improved, but computation time increases
Solution Approach 1:
The patent performs preliminary mask conversion operations before the main cryptographic computation begins. By converting masks to the appropriate form in advance and preparing the random masking values beforehand, the system reduces the computational overhead during the actual encryption/decryption process, thereby minimizing the overall time loss while maintaining security
Solution Approach 2:
The patent implements optimized conversion paths that skip unnecessary intermediate steps when security conditions are already satisfied. By detecting when certain mask conversions are not needed and rushing through the essential operations with minimized steps, the system reduces computation time while maintaining adequate power analysis attack resistance
Data Source
AI summary
A method for secure conversion between two different random markings used for cryptographic functions, converts a first binary data word, masked by a binary mask word according to a first masking process, into a corresponding second binary data word, masked by said binary mask word according to a second masking process, the first and second binary data words and the binary mask word including corresponding pluralities of bits, wherein each of the pluralities of the bits includes a least significant bit, a first bit, and at least one i-th bit i≧2.