Mask Data Generation for Semiconductor Hole Pattern Depth Correction
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Solution Overview
Problem
In semiconductor manufacturing, particularly for three-dimensional NAND flash memory, there is a challenge in achieving precise process conversion difference correction between resist patterns and design layout patterns due to variations in pattern depths and arrangement attributes, leading to inaccuracies in hole pattern dimensions during the lithography process.
Innovation Solution
A method for generating mask data that involves obtaining depth information and applying correction rules to correct process conversion differences, specifically using first and second correction rules based on pattern depth and arrangement attributes to improve precision in hole pattern processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a mask pattern is generated to be similar to a design layout pattern, then the manufacturing process is simplified, but process conversion difference causes dimension inaccuracy in the processed pattern
Solution Approach 1:
The patent applies preliminary action by performing process conversion difference correction in advance during mask data generation. Correction amounts are calculated based on pattern attributes (depth, arrangement) and applied to the mask pattern before lithography, so that the resist pattern dimensions are pre-adjusted to compensate for expected process variations, achieving accurate processed patterns without complex real-time control
Solution Approach 2:
The patent applies local quality by making correction amounts dependent on specific pattern attributes. Different correction values are assigned based on pattern depth and arrangement characteristics, so that each pattern region receives customized correction tailored to its local properties, thereby achieving high precision across diverse pattern types while maintaining a unified mask generation process
2Manufacturing precision
If correction rules are applied based on pattern depth and arrangement attributes, then manufacturing precision is improved, but device complexity increases due to multiple correction rules
Solution Approach 1:
The patent applies segmentation by dividing the correction process into distinct segments based on pattern attributes. Correction rules are segmented according to pattern depth ranges and arrangement types, allowing each segment to be handled by specific correction logic. This modular approach improves precision for different pattern categories while organizing the complexity into manageable, rule-based segments
Solution Approach 2:
The patent applies parameter changes by using pattern attributes (depth, arrangement) as input parameters to determine correction amounts. The correction system dynamically adjusts parameters based on the specific pattern being processed, transforming a complex precision problem into a parameter-driven calculation process that maintains accuracy without requiring overly complex system architecture
Data Source
AI summary
According to one embodiment, there is provided a mask data generation method. The mask data generation method includes obtaining depth information about a pattern depth of a hole included in design information about a semiconductor device. The mask data generation method includes obtaining a first correction rule used to correct, in terms of the pattern depth, a process conversion difference between a resist pattern and a processed pattern. The mask data generation method includes determining temporary mask data including a lithography target pattern by applying a first process conversion difference correction processing to a dimension of hole pattern arranged in design layout data based on the depth information and the first correction rule.