Mask Data Verification via Interaction Number Detection
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Solution Overview
Problem
Current methods for designing semiconductor integrated circuits are time-consuming and require significant trial and error, especially in verifying mask data to ensure accurate layout and manufacturing, which affects the integration density and cost of semiconductor devices.
Innovation Solution
A method for verifying mask data in a computing device by receiving layout and mask data, determining interaction numbers to detect errors, and performing optical proximity correction to ensure accurate pattern alignment and reduce design time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If traditional layout design methods are used, then design flexibility is maintained, but layout design time increases significantly
Solution Approach 1:
The patent performs optical proximity correction in advance during the layout design process, before mask data generation. By pre-calculating and applying correction factors to compensate for optical effects, the system eliminates the need for time-consuming trial-and-error corrections later in the manufacturing process, thus reducing overall design time while maintaining accuracy.
Solution Approach 2:
The patent implements a verification mechanism that checks mask data against corrected layout data to detect interactions or overlaps. This feedback loop identifies errors automatically and allows for rapid correction, significantly reducing the iterative design cycles and time loss associated with traditional manual verification methods.
2Manufacturing precision
If mask data is generated without verification, then manufacturing speed increases, but manufacturing precision decreases
Solution Approach 1:
The patent replaces manual visual inspection and trial-and-error verification with an automated computer-based verification system. The system automatically compares mask data with optically corrected layout data, detects interactions through computational algorithms, and identifies errors without human intervention, thereby maintaining high precision while increasing verification speed.
Solution Approach 2:
The patent introduces optical proximity correction parameters that modify the layout data before mask generation. By adjusting these parameters to account for optical effects such as diffraction and interference, the system achieves more accurate pattern alignment. The verification process then checks whether the corrected patterns interact or overlap, providing precise control over manufacturing quality.
3Manufacturing precision
If optical proximity correction is applied, then pattern alignment accuracy improves, but processing complexity increases
Solution Approach 1:
The patent divides the optical proximity correction process into discrete, manageable steps: calculating optical effects for specific pattern types, applying correction factors to layout data, generating corrected layout patterns, and verifying against mask data. This segmentation allows the complex correction process to be handled systematically through automated algorithms, reducing the perceived complexity while maintaining accuracy.
Solution Approach 2:
The patent introduces an intermediary verification step that acts as a mediator between the corrected layout data and the final mask data. This intermediary check detects interactions or overlaps by comparing the two datasets, providing a simple pass/fail verification that simplifies the overall process. The intermediary layer absorbs the complexity of optical correction calculations while presenting a straightforward verification interface.
Data Source
AI summary
A method for verifying mask data in a computing device includes receiving layout data, receiving mask data, determining an interaction number between a pattern corresponding to the layout data and a pattern corresponding to the mask data, and detecting an error of the mask data based on the interaction number.