Selective Mask Deposition for IC Lithography Precision

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The miniaturization of integrated circuits is limited by the constraints of photolithographic techniques, which struggle to form features below a certain pitch, leading to precision issues and high costs in equipment and low production yields due to the need for tight geometric control in mask edge placement.

Innovation Solution

A method involving a selective deposition process to form a mask with an edge portion over a substrate, using a self-assembled monolayer to create a gap that is filled with a layer by atomic layer deposition, improving electrical paths and precision in self-aligned processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If photolithography techniques are used to pattern IC features, then manufacturing capability is maintained, but minimum pitch limits feature size reduction

Engineering Contradiction:
Improvefeature sizeVSAvoidpattern formation reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies segmentation by dividing the single lithography step into multiple patterning steps (e.g., self-aligned double patterning, self-aligned quadruple patterning). Each step creates a portion of the final pattern, allowing feature sizes below the minimum pitch of individual lithography steps to be achieved reliably.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses preliminary actions through self-aligned processes where mandrels are formed first, then spacer materials are deposited and etched to create subsequent patterns. This preliminary structure formation enables precise pattern placement without requiring additional lithography alignment steps.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If multi-cut or block masks are used in SADP/SAQP/LELE processes, then device patterning capability is extended, but mask edge placement precision requirements increase

Engineering Contradiction:
Improvepatterning capabilityVSAvoidmask edge placement
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent employs self-service through self-aligned processes where the mask pattern is automatically aligned to previous structures through physical constraints (mandrels, spacers) rather than requiring external alignment equipment. This eliminates the need for expensive high-precision alignment equipment and reduces mask edge placement requirements.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent uses intermediary structures (mandrels, spacer materials) that mediate between the lithography step and final pattern formation. These intermediaries carry the alignment information and enable precise pattern transfer without direct mask-to-substrate alignment requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If tight geometric requirements are imposed on mask edge placement, then pattern precision is improved, but production yield decreases

Engineering Contradiction:
Improvepattern precisionVSAvoidproduction yield
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The self-aligned processes allow structures to self-correct their positioning through physical constraints, eliminating the need for tight mask edge placement control. This reduces manufacturing complexity and improves production yield while maintaining high pattern precision.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the precision and reliability of feature formation in integrated circuits, improving electrical paths and reducing production costs by allowing for more precise control over mask edge placement and feature size reduction.

Implementation Method 1

using a self-assembled monolayer to create a gap

Methodology Applied
Scientific EffectSelf-assembly: Self-Assembly

Implementation Method 2

forming a layer on the mask and the exposed second surface of the second material by an atomic layer deposition process

Methodology Applied
Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Data Source

PatentUS10957590B2Method for forming a layer
Publication Date: 2021.03.23 APPLIED MATERIALS INC
  • US10957590B2 patent drawing
  • US10957590B2 patent drawing
  • US10957590B2 patent drawing

AI summary

Implementations of the present disclosure generally relate to the fabrication of integrated circuits, and more particularly, to methods for forming a layer. The layer may be a mask used in lithography process to pattern and form a trench. The mask is formed over a substrate having at least two distinct materials by a selective deposition process. The edges of the mask are disposed on an intermediate layer formed on at least one of the two distinct materials. The method includes removing the intermediate layer to form a gap between edges of the mask and the substrate and filling the gap with a different material than the mask or with the same material as the mask. By filling the gap with the same or different material as the mask, electrical paths are improved.