Mask-Free Gate Oxide Process for Higher Drain-Gate Breakdown
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Solution Overview
Problem
Current manufacturing processes for power semiconductor devices result in a divot near the oxide diffusion/shallow trench isolation region, leading to a thinner high voltage gate oxide region, which severely degrades the drain to gate breakdown voltage, limiting their use for high voltage operations.
Innovation Solution
A mask-free process is employed that utilizes a sacrificial oxide layer formed by in-situ steam generation for the gate oxide region, preventing the formation of a divot-induced thinner gate oxide region and improving the drain to gate breakdown voltage by more than 30% without requiring additional masks or thermal budgets, and can be used to manufacture core, input/output, and high voltage devices simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional manufacturing process is used for power semiconductor devices, then the device can be manufactured with standard processes, but a divot is formed near the oxide diffusion/shallow trench isolation region resulting in a thinner gate oxide region which degrades the drain to gate breakdown voltage
Solution Approach 1:
A sacrificial oxide layer is formed in advance at the location where the divot would subsequently form. This preliminary action prevents the divot from forming during later processing steps, ensuring uniform gate oxide thickness and maintaining high breakdown voltage throughout the device structure.
Solution Approach 2:
The sacrificial oxide layer acts as an intermediary element that occupies the space where the divot would form. By introducing this intermediate layer, the harmful divot formation is prevented, and the gate oxide can be formed uniformly over the entire surface including the previously problematic region.
2Manufacturing precision
If additional masks or thermal processing steps are added to fix the divot issue, then the gate oxide thickness can be improved, but the process complexity and manufacturing time increase
Solution Approach 1:
The formation of the gate oxide and the prevention of divot formation are merged into a single process step. By forming the sacrificial oxide layer beforehand, the need for separate corrective steps such as additional masks or thermal processing is eliminated, simplifying the overall manufacturing process.
Solution Approach 2:
The sacrificial oxide layer automatically prevents divot formation during subsequent processing steps without requiring additional intervention. The layer serves its protective function passively, eliminating the need for complex active control measures or additional process steps.
3Ease of manufacture
If the gate oxide region is made thinner to accommodate the divot, then the manufacturing process is simpler, but the drain to gate breakdown voltage is severely degraded limiting high voltage operation
Solution Approach 1:
The sacrificial oxide layer is formed in advance to occupy the space where the divot would form. This preliminary action allows the gate oxide to be formed at its full intended thickness without being thinned to accommodate the divot, maintaining both manufacturing simplicity and high breakdown voltage.
Solution Approach 2:
The potential harm of divot formation is converted into a benefit by using the sacrificial oxide layer as a placeholder. The layer that would normally be considered waste material is instead utilized to prevent the divot, transforming a potential defect into a protective feature that enables high voltage operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method significantly enhances the drain to gate breakdown voltage by over 30% compared to current processes, enabling the use of semiconductor devices for high voltage operations without affecting the performance of other devices, and reduces process steps and cycle times.
Implementation Method 1
A mask-free process is employed that utilizes a sacrificial oxide layer formed by in-situ steam generation for the gate oxide region
Data Source
AI summary
A semiconductor device may include a first device on a first portion of a substrate, a second device on a second portion of the substrate, and a third device on a third portion of the substrate. The third device may include an oxide layer that is formed from an oxide layer that is a sacrificial oxide layer for the first device and the second device. The third device may include a gate provided on the oxide layer, a set of spacers provided on opposite sides of the gate, and a source region provided in the third portion of the substrate on one side of the gate. The third device may include a drain region provided in the third portion of the substrate on another side of the gate, and a protective oxide layer provided on a portion of the gate and a portion of the drain region.