Mask Layout Merging for Semiconductor Image Stitching
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Solution Overview
Problem
Existing image stitching methods for semiconductor integrated circuits require multiple mask images and repeated exposures, leading to increased exposure time and potential defects.
Innovation Solution
The proposed method reduces the number of mask images and exposure times by merging logic and cutting path images between adjacent unit regions and placing cutting path images inside peripheral mask images, allowing for seamless stitching and reduced exposure time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If repeated exposure is adopted for the pixel region and surrounding cutting path and logic regions are exposed separately, then the stitching product can be manufactured, but the number of exposure times increases and exposure speed decreases
Solution Approach 1:
The patent merges the cutting path image and logic region image into a single peripheral mask image. Instead of exposing the pixel region, cutting path, and logic region separately with different mask images, the invention combines the cutting path image with the logic region image to form an integrated peripheral mask image that covers both areas. This merging reduces the total number of exposure operations while ensuring complete coverage of all required regions.
Solution Approach 2:
The peripheral mask image serves multiple functions simultaneously: it defines both the cutting paths for separating adjacent chips and the logic regions for circuit functionality. By designing the peripheral mask image to include both cutting path images and logic region images, a single mask image performs what previously required multiple separate mask images, thereby reducing exposure times.
2Manufacturing precision
If multiple different mask images are designed for pixel region, cutting path, and logic region, then complete coverage is achieved, but the number of mask images increases and process complexity increases
Solution Approach 1:
The invention combines multiple mask images into fewer integrated mask images. Specifically, the cutting path image is merged with the logic region image to form a unified peripheral mask image. This reduces the total number of mask images from three separate images (pixel region mask, cutting path mask, logic region mask) to two integrated mask images (unit mask image and peripheral mask image), simplifying the manufacturing process.
Solution Approach 2:
The mask layout is segmented into two functional parts: the unit mask image that defines the pixel region, and the peripheral mask image that defines both cutting paths and logic regions. This segmentation allows each mask image to have a specific function while reducing the overall complexity compared to having separate masks for each region type.
3Manufacturing precision
If separate exposure is performed for peripheral regions on four sides and four corners, then all areas are covered, but the number of exposure times increases and delivery speed decreases
Solution Approach 1:
The patent merges all peripheral region exposures into a single operation. Instead of performing separate exposures for the four sides and four corners of the peripheral regions, the invention uses a unified peripheral mask image that covers all peripheral areas. This allows all peripheral regions to be exposed simultaneously in one operation, dramatically reducing the total exposure time while ensuring complete coverage of all peripheral areas including sides and corners.
Data Source
AI summary
The present application discloses an image stitching method for a stitching product, which includes: step 1: providing a chip design layout of the stitching product; step 2: designing a mask layout according to the chip design layout, including: step 21: setting unit mask images; step 22: merging logic images or cutting path images of adjacent areas between unit regions together to set corresponding peripheral mask images; step 23: merging the same peripheral mask images into one; step 24: constituting a mask layer by using the unit mask images and each peripheral mask image, and forming the mask layout on a mask; step 3: performing repeated exposure to form the stitching product. The present application can reduce the number of mask images, the number of times of exposure and the time of exposure.