Mask Optimization via Cross-Domain Correlated Engine
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Solution Overview
Problem
The integrated circuit (IC) manufacturing process faces challenges in linking design knowledge to real-world manufacturing processes, leading to yield loss due to systematic and parametric defects, with current methods focusing on functional areas and lacking insight into parametrically sensitive regions, resulting in inefficient hot spot determination and metrology/inspection point selection.
Innovation Solution
A cross-domain correlated engine is used to model and optimize semiconductor manufacturing by closing the loop between design and manufacturing, incorporating feedback from manufacturing processes to improve design efficiency and accuracy, including parametric and functional information, and hot spot determination, thereby enhancing mask optimization, process optimization, and inspection optimization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If RET (Resolution Enhancement Techniques) are applied to masks to meet photolithographic requirements for shrinking feature sizes, then manufacturing precision is improved, but manufacturing cost and cycle time increase exponentially
Solution Approach 1:
The patent applies preliminary action by performing design optimization and hot spot identification before tapeout. The system analyzes the complete design hierarchy including circuit criticalities and manufacturing assumptions upfront, identifying parametrically sensitive areas and optimizing mask patterns in advance. This prevents the need for extensive RET iterations during manufacturing, thereby reducing cycle time while maintaining precision.
Solution Approach 2:
The patent implements feedback by creating a closed-loop system that correlates electrical and physical attributes from design with manufacturing outcomes. The system uses design knowledge including circuit criticalities and process models to predict manufacturing issues, then feeds this information back to optimize mask patterns before production. This feedback mechanism enables precise manufacturing without requiring multiple costly RET iterations.
2Reliability
If traditional brightfield imaging wafer defect inspection techniques are used for RET Process Window Optimization, then functional areas are identified, but parametrically sensitive areas are not accounted for leading to incomplete yield optimization
Solution Approach 1:
The patent merges functional and parametric analysis by combining brightfield imaging inspection with electrical attribute analysis. The system correlates physical layout information with circuit criticalities and electrical measurements, creating a unified view that identifies both functional defects and parametrically sensitive areas. This integration ensures that optimization considers both manufacturing functionality and electrical performance parameters.
Solution Approach 2:
The patent adds another dimension by incorporating electrical and parametric attributes into the traditional physical inspection framework. Instead of only analyzing physical layout and functional areas, the system overlays electrical criticalities, circuit performance data, and parametric sensitivity information. This multi-dimensional approach enables identification of parametrically sensitive areas that would be invisible to traditional inspection methods.
3Ease of manufacture
If design knowledge is stripped out into geometry-only GDS-II format at tapeout, then manufacturing handoff is simplified, but design knowledge becomes unavailable for subsequent manufacturing optimization
Solution Approach 1:
The patent introduces an intermediary system that bridges design and manufacturing by maintaining and utilizing design knowledge throughout the manufacturing process. The system acts as a mediator by correlating design attributes (circuit criticalities, process models, electrical characteristics) with manufacturing data, enabling optimization without requiring design knowledge to be stripped away. This intermediary layer preserves design intelligence while facilitating manufacturing handoff.
Solution Approach 2:
The patent applies preliminary action by extracting and utilizing design knowledge before the final tapeout geometry generation. The system analyzes design attributes, circuit criticalities, and manufacturing assumptions upfront to identify optimization opportunities. This preliminary utilization of design knowledge enables manufacturing optimization to occur before geometry finalization, preventing information loss while maintaining manufacturing simplicity.
4Device complexity
If only functional areas are monitored for lithography criticality, then inspection complexity is reduced, but parametric yield loss remains undetected until end-of-manufacturing electrical testing
Solution Approach 1:
The patent merges functional inspection with parametric monitoring by integrating electrical attribute measurement with physical layout analysis. The system combines traditional lithography criticality identification with electrical performance monitoring, enabling simultaneous detection of both functional and parametric issues. This merged approach maintains relatively simple inspection systems while extending detection capability to parametric yield loss.
Solution Approach 2:
The patent applies preliminary action by implementing parametric monitoring during the manufacturing process rather than waiting for end-of-line electrical testing. The system uses design knowledge including circuit criticalities to identify parametrically sensitive areas and monitors these areas throughout manufacturing. This preliminary detection enables early identification of parametric yield loss, allowing for corrective action before final product completion.
Data Source
AI summary
A method and apparatus for mask optimization is provided. Mask design and production is optimized by providing proper weighting parameters for critical features. The parameters may include information such as parametric information, functional information, and hot spots determination.