Semiconductor Mask Patterning With Oxidized Photoresist for Low LWR
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Solution Overview
Problem
As semiconductor devices continue to shrink, traditional photolithography equipment struggles to maintain the desired spacing between elements, leading to increased line width roughness (LWR) and reduced device performance due to the limitations of current manufacturing processes.
Innovation Solution
A method involving plasma treatment of the photoresist layer and forming a protective film stack, including an anti-reflective coating, hard mask, and dielectric layers, to enhance etching selectivity and pattern transfer, reducing LWR and improving device performance by forming conductive features with reduced defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional photolithography equipment is used to manufacture semiconductor devices, then the manufacturing process is simple and well-established, but the spacing between elements cannot be reduced below a certain limit and line width roughness increases
Solution Approach 1:
The patent divides the manufacturing process into multiple stages: first forming a patterned photoresist layer, then using it as a mask to deposit a first conductive layer, removing the photoresist, and finally depositing a second conductive layer. This segmentation allows each stage to be optimized independently, achieving finer spacing precision without overwhelming process complexity
Solution Approach 2:
The patent performs preliminary patterning of the photoresist layer before depositing the conductive layers. By pre-forming the pattern structure and using it as a mask, the subsequent deposition steps can achieve higher precision with simpler equipment, effectively reducing element spacing while maintaining process manageability
2Quantity of substance
If photolithography processes are adapted for down-scaling, then device density increases, but process windows narrow and manufacturing becomes difficult
Solution Approach 1:
The patent transitions from planar photolithography limitations to three-dimensional structure formation by depositing conductive layers at different stages. This dimensional approach allows higher device density through vertical stacking of conductive layers while maintaining easier manufacturing through sequential, well-controlled deposition processes
Solution Approach 2:
The patent changes the manufacturing parameters by using physical vapor deposition or chemical vapor deposition for conductive layers instead of relying solely on photolithographic patterning. This parameter change enables finer feature sizes and higher density while keeping the process window open through precise control of deposition conditions
3Length of moving object
If pitch is reduced below traditional photolithography limits, then device spacing decreases, but line width roughness increases and device performance deteriorates
Solution Approach 1:
The patent performs preliminary patterning to define precise feature locations before material deposition. By establishing the pattern structure first and using it as a mask, the subsequent conductive layer formation achieves lower line width roughness even at reduced pitches
Solution Approach 2:
The patent replaces the mechanical/optical limitation of photolithography with a deposition-based approach. By using physical or chemical vapor deposition to form conductive layers, the process achieves finer pitch control with reduced line width roughness, substituting the photolithographic mechanism with a more precise deposition mechanism
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the reliable formation of conductive lines with spacings of 50 nm or less with fewer manufacturing defects and increased yield, resulting in smoother profiles and decreased sheet resistance, thereby enhancing semiconductor device performance.
Implementation Method 1
performing an oxygen plasma treatment on the photoresist layer, the oxygen plasma treatment converting the photoresist layer to a treated photoresist layer by oxidizing an exposed surface of the photoresist layer
Implementation Method 2
performing an oxygen plasma treatment on the photoresist layer, the oxygen plasma treatment converting the photoresist layer to a treated photoresist layer
Data Source
AI summary
A method of forming a semiconductor device includes forming a photoresist layer over a mask layer, patterning the photoresist layer, and forming an oxide layer on exposed surfaces of the patterned photoresist layer. The mask layer is patterned using the patterned photoresist layer as a mask. A target layer is patterned using the patterned mask layer as a mask.