Semiconductor Mask Pitch Adjustment With Rework Feedback
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Solution Overview
Problem
Existing negative tone development (NTD) and positive tone development (PTD) processes in semiconductor lithography face issues with depth of focus (DOF), line width roughness (LWR), and scum, leading to degraded lithography performance and decreased yield or device failure.
Innovation Solution
A method involving the formation of a pitch adjustment layer on a patterned photoresist layer to define a mask pattern, with the option to perform rework operations if the mask pattern does not meet semiconductor fabrication specifications, including removal of the pitch adjustment layer and/or patterned photoresist layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If NTD or PTD processes are used to achieve reduced device size, then line width reduction is improved, but depth of focus, line width roughness, and scum issues worsen
Solution Approach 1:
A pitch adjustment layer is introduced as an intermediary between the photoresist layer and the target layer. This intermediate layer enables precise pitch control and pattern definition while avoiding the direct drawbacks of NTD/PTD processes, thereby improving lithography performance without sacrificing line width reduction capability
Solution Approach 2:
The patterning process is segmented into multiple stages: forming a photoresist layer, creating a pitch adjustment layer with controlled pitch, and then using this as a mask for target layer patterning. This segmentation allows each layer to perform its specific function optimally, resolving the contradiction between line width reduction and lithography performance
2Manufacturing precision
If pitch adjustment layer is formed to define mask pattern, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The pitch adjustment layer is formed in advance with a predetermined pitch that is smaller than the photoresist pattern pitch. This preliminary action establishes the final pitch requirement before target layer patterning, enabling precise pitch control while organizing the process steps in a logical sequence that manages complexity
3Reliability
If rework operation is performed to remove pitch adjustment layer, then yield is improved, but loss of time increases
Solution Approach 1:
The process includes inspection of the mask pattern to determine whether it meets fabrication specifications. This feedback mechanism allows identification of defects early, enabling targeted rework operations only when necessary, thereby improving yield while minimizing unnecessary time loss from redundant processing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves the yield of semiconductor device structures by allowing for precise control of pitch and alignment, reducing defects through rework operations.
Implementation Method 1
forming a pitch adjustment material on the patterned photoresist layer, wherein the pitch adjustment material reacts with the patterned photoresist layer to form a pitch adjustment layer at an interface between the pitch adjustment material and the patterned photoresist layer
Implementation Method 2
exposing a first portion of the photoresist layer to radiation while a second portion of the photoresist layer is covered thereby unexposed to the radiation
Data Source
AI summary
A method of manufacturing a semiconductor device structure is provided. The method includes: providing a substrate; forming a photoresist layer on the substrate; patterning the photoresist layer to form a patterned photoresist layer; forming a pitch adjustment layer on the patterned photoresist layer to define a mask pattern; and determining whether the mask pattern meets a specification of semiconductor fabrication processes; when it is determined that the mask does not meet the specification of semiconductor fabrication processes, performing a rework operation to remove the pitch adjustment layer.


