Patterned Mask Plasma Etching With Protective Sidewall Lining

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Solution Overview

Problem

Existing plasma etching technologies struggle to achieve precise control over critical dimensions and sidewall profiles of nanoscale features in semiconductor manufacturing, leading to variations in electrical characteristics and reduced manufacturing yield due to plasma damage and undesired sidewall profiles.

Innovation Solution

A method involving a cyclic plasma etch process with a deposition-etch step using a fluorocarbon layer and a DC bias to form an etch-resistant lining, followed by a flush step to control the width and profile of openings in the layer-to-be-patterned, utilizing a plasma system with RF and DC power configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional plasma etching is used to etch high aspect ratio structures, then etching capability is achieved, but critical dimension control and sidewall profile precision deteriorate

Engineering Contradiction:
Improvecritical dimension controlVSAvoidplasma damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

A protective lining is formed on the sidewalls before the main etching process through a deposition step. This preliminary action prevents plasma damage to the sidewalls during etching, enabling precise critical dimension control while maintaining etching capability for high aspect ratio structures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective lining acts as an intermediary layer between the plasma and the sidewalls. It mediates the interaction by absorbing plasma energy and preventing direct plasma damage to the sidewalls, thereby improving critical dimension control and reducing plasma damage effects.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If feature sizes are shrunk to nanoscale, then component packing density is doubled, but etching precision and sidewall profile control worsen

Engineering Contradiction:
Improvecomponent packing densityVSAvoidsidewall profile control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The protective lining is deposited beforehand on the sidewalls before etching nanoscale features. This preliminary protective layer prevents plasma-induced sidewall roughening and profile distortion, enabling precise sidewall profile control even when feature sizes are shrunk to nanoscale for doubled component packing density.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The process uses parameter changes by alternating between deposition and etching steps in a cyclic manner. The deposition step modifies the sidewall surface by adding protective material, while the etching step removes material to form the desired pattern. This parameter modulation enables precise control of sidewall profiles at nanoscale dimensions.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If cyclic deposition-etch process is used, then critical dimension control is improved, but process complexity increases

Engineering Contradiction:
Improvewidth variations controlVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The etching process is segmented into discrete cyclic steps: deposition step, etching step, and flush step. Each segment performs a specific function - deposition forms protective lining, etching creates the pattern, and flush removes byproducts. This segmentation enables precise width variations control through incremental adjustments while organizing process complexity into manageable modular segments.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method reduces width variations and enhances control over critical dimensions, mitigating plasma damage and improving manufacturing yield by forming a protective lining that adjusts the final width of openings, resulting in smoother sidewalls and improved electrical performance.

Implementation Method 1

a first deposition step to conformally deposit a layer including an organic material including a fluorocarbon over the substrate

Methodology Applied
Scientific EffectPlasma deposition: Plasma Enhanced Chemical Vapour Deposition

Implementation Method 2

a deposition-etch step to sputter deposit a target material from a target electrode of the plasma chamber

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 3

extend the opening into the layer-to-be-patterned using an anisotropic self-limiting plasma etch process

Methodology Applied
Scientific EffectPlasma etching: Plasma

Implementation Method 4

a first flush step to remove remaining organic material

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS20250299962A1Method for etching a layer through a patterned mask layer
Publication Date: 2025.09.25 TOKYO ELECTRON LTD
  • US20250299962A1 patent drawing
  • US20250299962A1 patent drawing
  • US20250299962A1 patent drawing

AI summary

A method for fabricating a semiconductor device, where the method includes loading a substrate into a plasma chamber, the substrate including a patterned mask layer with an opening exposing a layer-to-be-patterned; and performing a number of cycles of a first plasma etch process, the first plasma etch process including: a first deposition step to conformally deposit a layer including an organic material including a fluorocarbon over the substrate, a deposition-etch step to sputter deposit a target material from a target electrode of the plasma chamber and extend the opening into the layer-to-be-patterned using an anisotropic self-limiting plasma etch process, and a first flush step to remove remaining organic material.