Lithography Mask Design for Resist Pattern Peeling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The scaling down of semiconductor integrated circuit (IC) feature sizes leads to challenges in lithography processes, where resist pattern peeling occurs due to light diffraction and reflection at material interfaces, affecting ion implantation and etching processes and ultimately the performance of IC devices.
Innovation Solution
A method is introduced to form a resist pattern by adjusting the dimension of the opening in the mask to compensate for light diffraction, refraction, and reflection at material interfaces, involving a flow chart of steps including substrate preparation, resist film deposition, exposure, and development, along with adjustments in the IC design layout to ensure accurate pattern formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the feature size is scaled down to increase functional density, then production efficiency is improved and costs are lowered, but light diffraction and reflection at material interfaces cause resist pattern peeling that affects ion implantation and etching processes
Solution Approach 1:
The patent applies preliminary anti-action by pre-compensating for light diffraction and reflection effects during mask design. The mask pattern is intentionally modified before lithography to counteract the expected resist pattern peeling that will occur during exposure, thereby preventing the harmful effect before it manifests in the final resist pattern.
Solution Approach 2:
The patent employs parameter changes by adjusting mask design parameters (such as feature dimensions and spacing) to compensate for optical effects. By modifying the mask pattern parameters, the lithography process accounts for light diffraction and reflection at material interfaces, ensuring accurate resist pattern formation at scaled dimensions.
2Area of moving object
If the feature size is scaled down, then more circuits can be integrated per chip area, but light diffraction and reflection at material interfaces cause resist pattern peeling
Solution Approach 1:
The mask design incorporates preliminary anti-action by pre-compensating for light diffraction and reflection effects. The pattern is intentionally modified before lithography to counteract the expected resist pattern peeling, thereby maintaining pattern stability even at reduced feature sizes that enable higher circuit integration density.
Solution Approach 2:
The patent converts the harmful effect of light diffraction and reflection into a beneficial outcome by using these optical effects predictably. Through careful mask design that accounts for these effects, the lithography process transforms potential pattern degradation into an opportunity for optimized pattern formation that maintains reliability at scaled dimensions.
3Ease of manufacture
If conventional lithography is used without compensation, then the process is simple, but resist pattern peeling occurs affecting ion implantation and etching processes
Solution Approach 1:
The patent applies preliminary action by performing mask design compensation before the actual lithography process. The mask pattern is pre-adjusted to account for light diffraction and reflection effects, so that when conventional lithography is performed, the compensation is already built in, maintaining both process simplicity and pattern accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves resist pattern quality and prevents peeling, ensuring precise feature formation and enhanced IC device performance by accounting for light behavior at material interfaces during lithography.
Implementation Method 1
adjusting the dimension of the opening in the mask to compensate for light diffraction
Implementation Method 2
adjusting the dimension of the opening in the mask to compensate for light diffraction, refraction, and reflection
Implementation Method 3
adjusting the dimension of the opening in the mask to compensate for light diffraction, refraction, and reflection at material interfaces
Data Source
AI summary
A method of fabricating a mask is described. The method includes receiving receiving an integrated circuit (IC) design layout that has a first pattern layer including a first feature and has a second pattern layer including a second feature, wherein the first pattern layer and the second pattern layer are spatially related when formed in a substrate such that the first and second features are spaced a first distance between a first edge of the first feature and a second edge of the second feature, modifying the IC design layout by adjusting a dimension of the first feature based on the first distance, and generating a tape-out data from the modified IC design layout for mask making. The method further includes applying a logic operation (LOP) to the IC design layout.