Mask Set Tile Segmentation for IC Fabrication Cost and Reliability
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Solution Overview
Problem
The increasing number of masks required for fabricating integrated circuits (ICs) with multiple layers and sizes leads to high costs, and existing solutions using tiles with interconnected designs face reliability issues due to exposed connections when cutting along scribe lines.
Innovation Solution
A mask set comprising base and top layer masks with different tile sizes, where each base layer mask includes a plurality of tiles of a first size, and top layer masks include tiles of varying sizes, allowing for shared masks across different IC sizes while avoiding exposed connections by using scribe lines to define tile boundaries.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If masks with tiles of the same size are used for all masks needed for fabricating ICs of different sizes, then mask costs are reduced through sharing, but reliability problems occur due to exposed connections between tiles when cutting along scribe lines
Solution Approach 1:
The mask set is segmented into different tile sizes - base layer masks use tiles of a first size while top layer masks use tiles of a second size. This segmentation allows each layer type to use optimally sized tiles for its specific fabrication needs, avoiding the reliability issues of exposed connections while still enabling cost-effective mask sharing across different IC sizes.
Solution Approach 2:
Different tile sizes are assigned to different mask types (base layer vs. top layer) based on their specific requirements. Base layer masks use one tile size optimized for their pattern density, while top layer masks use another tile size optimized for their interconnect patterns. This local optimization maintains connection reliability while achieving overall cost reduction through mask sharing.
2Adaptability or versatility
If the number of layers in an IC increases, then IC functionality is improved, but mask cost increases proportionally
Solution Approach 1:
The mask set is designed with universal base layer masks that can be used across multiple IC designs and layer configurations. By creating a standardized base layer mask library that can serve different IC types, the patent reduces the proportional increase in mask costs that would normally accompany increased layer counts and IC complexity.
3Adaptability or versatility
If ICs of N different sizes are fabricated, then market adaptability is improved, but mask quantity increases by N times
Solution Approach 1:
Masks are designed with universal applicability across different IC sizes through standardized tile configurations and scalable patterns. The base layer masks and top layer masks can be reused for fabricating ICs of various sizes by adjusting the number and arrangement of tiles, thereby supporting market adaptability without requiring N times the mask quantity.
Data Source
AI summary
A mask set is described. In one implementation, the mask set includes: a first plurality of base layer masks, where each base layer mask of the first plurality of base layer masks includes a plurality of base layer tiles of a first tile size; a first plurality of top layer masks, where each top layer mask of the first plurality of top layer masks includes a plurality of first top layer tiles of the first tile size; and a second plurality of top layer masks, where each top layer mask of the second plurality of top layer masks includes a plurality of second top layer tiles of a second tile size; where the second tile size is different from the first tile size. Also, a method of fabricating a plurality of integrated circuits (ICs) is described.