Mask-Integrated Protective Tape for Photolithography-Free Plasma Dicing

Solution Overview

Problem

The plasma dicing method for semiconductor wafers requires a photolithography process to form a mask resist, leading to increased costs, potential defects due to incomplete mask removal, and prolonged processing times, as well as limitations in kerf width and yield due to surface contamination and chip breakage.

Innovation Solution

A mask-integrated surface protective tape with a mask material layer directly on a substrate film or through a temporary-adhesive layer, which eliminates the need for photolithography, providing excellent peeling, cuttability by laser, and removability by plasma ashing, thereby simplifying the production of semiconductor chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If photolithography process is used to form mask resist for plasma dicing, then mask protection is achieved, but processing time increases and production costs increase

Engineering Contradiction:

Improvemask protectionVSAvoidprocessing time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The mask-integrated surface protective tape incorporates the mask pattern directly into the tape structure before the dicing process. This preliminary integration eliminates the need for separate photolithography steps to form mask resist, as the mask function is already built into the protective tape that is applied to the wafer surface.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The invention merges the surface protective tape and the mask resist into a single integrated component. The mask-integrated surface protective tape combines the protective function with the masking function, eliminating the need for separate mask formation and removal steps that are required in conventional photolithography-based plasma dicing.

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If photolithography process is used to form mask resist, then mask protection is achieved, but production costs increase due to additional facilities and materials

Engineering Contradiction:

Improvemask protectionVSAvoidproduction cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The invention merges the surface protective tape and the mask resist into a single integrated component. The mask-integrated surface protective tape combines the protective function with the masking function, eliminating the need for separate mask formation and removal steps that are required in conventional photolithography-based plasma dicing.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The invention extracts the mask formation process from the complex photolithography sequence and integrates it directly into the surface protective tape. This extraction eliminates the need for separate photolithography facilities, photoresist materials, and associated processing chemicals, thereby reducing production costs.

Inventive Principle:

Principle #2Taking out (Extraction)

3Productivity

If conventional blade dicing method is used, then cutting is achieved, but microscopic cracks and chipping occur in the semiconductor chip

Engineering Contradiction:

Improvecutting efficiencyVSAvoidchip integrity

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The invention replaces the mechanical blade cutting system with a plasma-based cutting system. Instead of using a physical blade that causes mechanical stress and chipping, the plasma dicing method uses reactive plasma to etch and separate the semiconductor wafer, eliminating the mechanical contact that causes microscopic cracks and chipping.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

4Productivity

If plasma dicing method is used without mask-integrated tape, then high etching speed is achieved, but surface contamination and incomplete mask removal occur

Engineering Contradiction:

Improveetching speedVSAvoidsurface cleanliness

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The invention merges the surface protective tape and the mask resist into a single integrated component. The mask-integrated surface protective tape combines the protective function with the masking function, eliminating the need for separate mask formation and removal steps that are required in conventional photolithography-based plasma dicing.

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces processing time, improves yield, and prevents defects by enabling precise cutting and efficient removal of the mask material, enhancing the overall operability and quality of semiconductor chip production.

Implementation Method 1

a parallel ray transmittance of the mask material layer at a wavelength region of 355 nm is 30% or less

Methodology Applied

Scientific EffectAbsorption (EM radiation): Absorption (EM radiation)

Implementation Method 2

a plasma dicing method of dividing a semiconductor wafer, by selectively etching with plasma a portion which is not covered with a mask

Methodology Applied

Scientific EffectPlasma: Plasma

Implementation Method 3

cutting a portion of the mask material layer corresponding to a street of the semiconductor wafer with a laser

Methodology Applied

Scientific EffectLaser ablation: Laser Ablation

Data Source

PatentUS11862504B2Mask-integrated surface protective tape, and method of producing a semiconductor chip using the same

Publication Date: 2024.01.02 FURUKAWA ELECTRIC CO LTD

AI summary

A mask-integrated surface protective tape, which has at least a substrate film and a mask material layer, wherein the mask material layer is provided directly on the substrate film, or is provided on the substrate film through a temporary-adhesive layer, and wherein a parallel ray transmittance of the mask material layer at a wavelength region of 355 nm is 30% or less; and a method of producing a semiconductor chip.