Masked Memory Cell for DPA-Resistant Binary State Storage
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Solution Overview
Problem
Conventional memory cells in security applications are vulnerable to differential power analysis (DPA), electromagnetic analysis (EMA), and probing attacks due to their power profiles and data access patterns, which can reveal sensitive information.
Innovation Solution
The implementation of a memory cell that stores binary states using a write indication and binary write masking values, along with complementary states, employing XOR operations to mask data both during storage and retrieval, thereby creating a power profile independent of the processed data and enhancing security against DPA, EMA, and probing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional memory cells are used in security applications, then the memory can store binary data with low energy and area consumption, but the power profiles and data access patterns reveal sensitive information through differential power analysis (DPA), electromagnetic analysis (EMA), and probing attacks
Solution Approach 1:
The patent introduces an intermediary masking layer between the stored data and the external observation points (power consumption, electromagnetic emissions, probing). By XORing the stored data with masking values stored in separate memory cells, the actual data is hidden behind multiple layers of masking, making it impossible for attackers to directly correlate power profiles or emissions with the underlying sensitive information
Solution Approach 2:
The patent dynamically changes the masking parameters (masking values) for each data access operation. By continuously updating the masking layer through XOR operations with randomly generated mask values, the power consumption pattern and electromagnetic emissions become unpredictable and uncorrelated with the actual stored data, effectively neutralizing DPA and EMA attacks
2Reliability
If data is encrypted using one-time-pad encryption to prevent DPA, then security against statistical analysis is improved, but the complexity of key management and encryption/decryption operations increases
Solution Approach 1:
The patent merges the encryption key management functionality directly into the memory cell structure itself. The masking values are stored in dedicated memory cells within the same memory array, eliminating the need for separate key management systems. This integration reduces device complexity while maintaining the security benefits of one-time-pad encryption through XOR-based masking operations
3Reliability
If dual-rail implementation is used to provide identical power profiles, then resistance to DPA is improved, but the area consumption and device complexity increase
Solution Approach 1:
The patent segments the masking function into separate, reusable components. Instead of duplicating entire dual-rail logic paths for each data line, the masking is performed by accessing separate masking value memory cells and XORing the results with the stored data. This segmentation allows the same masking infrastructure to serve multiple data lines, significantly reducing area consumption compared to full dual-rail implementation
Data Source
AI summary
A memory cell for storing a binary state, the memory cell being adapted for storing a binary state based on a write indication and a binary write masking value and for storing a complementary binary state based on the write indication and a complementary binary write masking value.