Masked-ROM FPGA Package for Lower-Cost Configuration
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Solution Overview
Problem
The high manufacturing costs of Field Programmable Gate Arrays (FPGAs) are not adequately reduced by existing methods, especially as the number of functional gates increases, and the development costs for replacing FPGAs with mask-programmable Hardwire devices become significant.
Innovation Solution
A method involving the fabrication of a first die with a masked-Read Only Memory (ROM) and a second die with a programmable logic device, where the ROM is hardened with configuration data during manufacturing, and both dies are stacked and encapsulated to form a single semiconductor package, eliminating the need for external configuration memory and reducing silicon area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If FPGAs are replaced with mask-programmable Hardwire devices to reduce manufacturing costs, then fabrication costs are reduced, but development costs become significant
Solution Approach 1:
The patent applies preliminary action by pre-programming the configuration data into the FPGA device during the manufacturing process itself, before the device is shipped to the customer. This eliminates the need for separate development and configuration steps that incur additional costs, as the device is delivered in its final configured state ready for immediate deployment.
2Area of stationary object
If configuration memory cells are eliminated in Hardwire devices to reduce silicon area, then manufacturing costs are reduced, but timing and performance matching becomes difficult
Solution Approach 1:
The patent uses copying by creating a precise replica of the original FPGA's configuration data and embedding it into the Hardwire device during manufacturing. This copying approach ensures that the timing and performance characteristics are exactly matched to the original design, eliminating the need for complex development processes while maintaining full functional equivalence.
3Adaptability or versatility
If configuration data is stored in external non-volatile memory to maintain programmability, then device flexibility is maintained, but device complexity and cost increase
Solution Approach 1:
The patent applies the extraction principle by removing the external non-volatile memory component from the system and instead integrating the configuration data directly into the Hardwire device's internal structure during manufacturing. This eliminates the need for separate memory hardware while maintaining the device's ability to perform its configured function, thereby reducing overall system complexity and cost.
Data Source
AI summary
A packaged PLD solution includes a first die having a masked-Read Only Memory (ROM) that is programmed during its fabrication to store configuration data, and includes a second die having a PLD including a number of configurable resources collectively configured to implement a circuit design embodied by the configuration data. The first die is electrically connected to the second die, and both the first die and second die are stacked and encapsulated together to form the packaged PLD solution. The configuration data is programmed into the masked-ROM by a manufacturer of both the masked-ROM and the PLD.