Maskless Lithography FPGA-GPU Control for Low-Latency Patterning
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing maskless lithography systems face challenges with high latency, cost, and inflexibility in real-time adjustments and pattern complexity, especially in semiconductor device manufacturing for displays and large area substrates.
Innovation Solution
A system and method utilizing a field programmable gate array (FPGA) and graphics processing unit (GPU) to process stage position data, enabling real-time computation of instructions for patterning substrates, reducing latency and improving adaptability through direct communication between FPGA and GPU.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If real-time adjustments are implemented in maskless lithography systems, then adaptability to varying pattern complexity is improved, but latency and processing time increase
Solution Approach 1:
The system divides the geometry processing task into segments handled by multiple GPUs working in parallel. Each GPU processes a portion of the pattern data simultaneously, reducing overall processing time and latency while maintaining adaptability to complex patterns.
Solution Approach 2:
An FPGA acts as an intermediary between the stage position sensors and the GPU processing system. The FPGA pre-processes stage position data and prepares it for GPU computation, enabling faster data flow and reducing latency in the real-time adjustment pipeline.
2Adaptability or versatility
If high geometry processing power is used for real-time adjustments, then pattern complexity handling is improved, but system cost increases
Solution Approach 1:
The system uses multiple GPUs that can be added or removed based on processing needs. This modular approach allows the system to scale geometry processing power according to pattern complexity requirements without requiring a complete system redesign, controlling overall system cost.
Solution Approach 2:
The system dynamically allocates computing resources by activating only the necessary number of GPUs based on the complexity of the current pattern being processed. This dynamic resource allocation optimizes the balance between processing capability and system cost.
3Manufacturing precision
If stage position data is processed in real-time, then manufacturing precision is improved, but processing speed decreases
Solution Approach 1:
The FPGA continuously pre-processes stage position data as it is generated by sensors, preparing the data for GPU computation before the actual patterning operation requires it. This preliminary processing ensures that precise position data is ready immediately when needed, maintaining both precision and speed.
Solution Approach 2:
The system maintains continuous data flow from stage sensors through FPGA pre-processing to GPU processing without interruption. This continuous pipeline ensures that real-time position corrections are computed and applied without breaking the processing flow, maintaining both precision and productivity.
Data Source
AI summary
Embodiments of the systems, methods, and software provided herein patterns substrates using digital lithography patterning controlled by field programmable gate arrays (FPGA). Stage position data is provided to the FPGA from the lithography environment and the data is loaded into a memory from the FPGA. The graphics processing unit, reads the data from the memory and calculates instructions based on the data. At least a portion of a substrate disposed on the stage is processed using instructions provided by the FPGA.