Semiconductor Package Interconnect Routing for Shifted Chip Contacts
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Solution Overview
Problem
The challenge in manufacturing semiconductor package structures is the shifting or rotating of semiconductor chips during the pick-and-place and molding processes, which limits the effective areas of pads, making it difficult to form accurate interconnection structures and potentially leading to defective packages and reduced yield due to misalignment of electrical contacts.
Innovation Solution
A method involving the measurement of actual electrical contact positions on semiconductor devices and forming an interconnection structure using a mask-less process to connect these contacts, ensuring signal integrity and meeting predetermined electrical performance criteria, even when chips shift or rotate, by adjusting the positions of external contacts accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If semiconductor chips are processed through pick-and-place and molding processes, then the package structure is formed, but the chips may shift or rotate causing misalignment of electrical contacts
Solution Approach 1:
The patent provides predetermined positions for electrical contacts on the package body before the chips are mounted. This preliminary positioning allows the interconnection structure to be designed and prepared in advance, compensating for potential chip shifts or rotations during manufacturing. The predetermined contact positions serve as reference points that guide the interconnection structure formation, ensuring proper alignment even when chips are not perfectly positioned.
Solution Approach 2:
The patent allows the actual positions of electrical contacts to deviate from predetermined positions within acceptable tolerances. By measuring actual contact positions and comparing them with predetermined positions, the system can identify and compensate for positional variations. This parameter-based approach enables the interconnection structure to be formed with adjusted dimensions and orientations that accommodate manufacturing variations while maintaining electrical performance criteria.
2Ease of manufacture
If the interconnection structure is formed based on predetermined contact positions, then the manufacturing process is simplified, but misalignment occurs when chips shift or rotate
Solution Approach 1:
The patent incorporates a feedback mechanism where actual positions of electrical contacts are measured and compared with predetermined positions. This feedback information is used to determine whether the actual positions satisfy predetermined electrical performance criteria. If the criteria are not met, the interconnection structure formation process can be adjusted or corrected, ensuring that reliable electrical connections are achieved despite chip misalignment.
Solution Approach 2:
The patent transitions from a static, fixed interconnection structure design to a dynamic approach where the interconnection structure can be adjusted based on actual contact positions. The system allows for real-time measurement and adjustment of contact positions, enabling the interconnection structure to adapt to manufacturing variations. This dynamic approach ensures that the interconnection structure maintains electrical performance criteria even when chips shift or rotate during manufacturing.
3Ease of manufacture
If a mask-based process is used to form the interconnection structure, then the process is well-established, but it cannot accommodate actual contact position variations
Solution Approach 1:
The patent provides predetermined positions for electrical contacts and uses these to guide the interconnection structure formation process. By establishing reference positions in advance, the system creates a framework that can accommodate actual position variations while maintaining a structured, manageable manufacturing process. The predetermined positions serve as a template that guides the formation process without requiring complete re-engineering of the manufacturing approach.
Solution Approach 2:
The patent allows the interconnection structure parameters (such as trace routing, pad dimensions, and orientation) to be adjusted based on actual contact positions. By changing these parameters within acceptable ranges, the system can accommodate position variations while still using established manufacturing processes. This parameter-based flexibility enables the interconnection structure to adapt to actual contact positions without requiring a completely new manufacturing approach.
Data Source
AI summary
A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.