Mass Storage Memory Host RAM Extension for Power and Flash Wear

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Solution Overview

Problem

Existing mass storage memories face challenges in cost, performance, and power efficiency, particularly in high-volume consumer devices like mobile wireless communication devices, due to the need for substantial RAM, wearing issues from frequent flash memory writes, and lengthy re-initialization times after power-off.

Innovation Solution

A method and apparatus that allow a mass storage memory device to allocate and utilize the RAM of a host device, enabling data transfer and storage in the host's RAM to extend its own volatile RAM, preserving data context during power-off.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If mass storage memory uses substantial internal RAM, then performance is improved, but cost increases

Engineering Contradiction:
ImproveperformanceVSAvoidcost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent merges the mass storage memory's RAM requirements with the host device's RAM resources. The host device's RAM is allocated to serve as extension RAM for the mass storage memory, allowing the system to achieve high performance without requiring the mass storage device to have substantial internal RAM, thereby reducing cost.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The host device's RAM serves dual purposes: it functions as the host's own working memory while simultaneously serving as extension RAM for the mass storage memory device. This multi-functionality eliminates the need for dedicated RAM in the mass storage device, reducing overall system cost while maintaining performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If mass storage memory allocates substantial internal RAM, then performance is improved, but power consumption increases

Engineering Contradiction:
ImproveperformanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent combines the RAM resources of the host device with the mass storage memory operations. By using the host's already-powered RAM for mass storage operations, the system achieves high performance without requiring the mass storage device to maintain its own substantial RAM, thereby reducing overall power consumption.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The host device's RAM serves the mass storage memory's needs without requiring the mass storage device to provide its own separate RAM resources. The host system's existing infrastructure is utilized to support the mass storage operations, reducing the power burden on the mass storage device itself.

Inventive Principle:
Principle #25Self-service

3Loss of time

If mass storage memory uses internal RAM for data storage, then re-initialization time is reduced, but device complexity increases

Engineering Contradiction:
Improvere-initialization timeVSAvoiddevice complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent introduces the host device's RAM as an intermediary between the mass storage memory and permanent storage. This intermediary RAM allows data to be cached during operation, enabling fast re-initialization without requiring complex internal RAM management within the mass storage device itself. The host system's memory management infrastructure handles the complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system preliminarily loads data into the host's RAM during normal operation, preparing it for quick access during re-initialization. This preliminary action in the host's RAM eliminates the need for complex internal RAM structures in the mass storage device, as the host's memory system handles the preliminary data preparation.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If mass storage memory writes frequently to flash memory, then data is preserved, but wear on flash memory increases

Engineering Contradiction:
Improvedata preservationVSAvoidflash memory lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent uses the host device's RAM as an intermediary layer between write operations and the flash memory. Frequently accessed data is maintained in the host's RAM, reducing the frequency of writes to flash memory. This intermediary approach preserves data reliability while significantly extending flash memory lifespan by minimizing write cycles.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system discards frequent write operations to flash memory by maintaining data in the host's RAM instead. The RAM serves as a recovery mechanism, allowing data to be preserved in volatile memory during operation and only written to flash when necessary, thereby extending flash memory durability while maintaining data preservation.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS20250258601A1Apparatus and method to share host system ram with mass storage memory ram
Publication Date: 2025.08.14 MEMORY TECHNOLOGIES LLC
  • US20250258601A1 patent drawing
  • US20250258601A1 patent drawing
  • US20250258601A1 patent drawing

AI summary

A method includes, in one non-limiting embodiment, sending a request from a mass memory storage device to a host device, the request being one to allocate memory in the host device; writing data from the mass memory storage device to allocated memory of the host device; and subsequently reading the data from the allocated memory to the mass memory storage device. The memory may be embodied as flash memory, and the data may be related to a file system stored in the flash memory. The method enables the mass memory storage device to extend its internal volatile RAM to include RAM of the host device, enabling the internal RAM to be powered off while preserving data and context stored in the internal RAM.