Master Control Unit Memory Address Routing for Image Forming Apparatus
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Solution Overview
Problem
In image forming apparatuses using electrophotography, a single central processing unit handles multiple functions, leading to increased processing load, complex wiring, and reduced productivity due to serial communication delays, which can cause issues like motor control delays and increased memory costs.
Innovation Solution
An information processing system with a master control unit and slave control units connected via parallel and serial communication lines, utilizing a system address space that integrates master and slave memory spaces to efficiently manage data transmission and processing, reducing the need for frequent memory pauses and increasing productivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If distributed control with multiple control modules is implemented, then processing load is reduced and wiring complexity is decreased, but serial communication delays increase causing motor control issues
Solution Approach 1:
The master control unit serves as an intermediary between the arithmetic processing unit and slave control units. It receives write commands from the arithmetic processing unit, determines whether the target address belongs to master memory or slave memory, and manages data transmission accordingly. This intermediary role streamlines the control architecture and reduces communication delays.
Solution Approach 2:
The memory space is segmented into master memory address space and slave memory address space. The address decoder in the master control unit analyzes address information to determine whether the target address belongs to master memory or slave memory, enabling efficient routing of data to the appropriate memory location and reducing communication overhead.
2Reliability
If memory capacity is increased to prevent control delays, then motor control reliability is improved, but system cost increases
Solution Approach 1:
The master control unit performs multiple functions: it acts as a communication controller managing data transmission to slave control units, serves as an address decoder to determine memory ownership, and functions as a buffer storing data temporarily before transmission. This multi-functionality eliminates the need for additional dedicated components and reduces overall memory requirements in the system.
3Reliability
If the CPU waits for serial communication completion, then data transmission accuracy is ensured, but productivity decreases
Solution Approach 1:
The master control unit autonomously manages the data transmission process to slave control units without requiring the arithmetic processing unit to wait. After the arithmetic processing unit writes data to the master control unit, the master control unit independently determines the destination, formats the data, and transmits it to the appropriate slave control unit, allowing the arithmetic processing unit to continue processing without delays.
Data Source
AI summary
The information processing system includes an arithmetic processing unit, a master control unit including a master memory, and slave control units each including a slave memory. The master control unit stores in a master memory transmission data including address information that can designate the address of any one of the master memory and the slave memory, which is sent from the arithmetic processing unit, or transmits the transmission data to the corresponding slave memory via a communication data memory. Such the information processing system can reduce the number of times of directions from the master control unit to the slave control unit.