Master-Slave Interface Signaling for Faster Two-Pad Data Transfer
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Solution Overview
Problem
Existing communication systems between master and slave devices, such as those using I²C, are limited by the need to transmit additional data bits to indicate operation types, leading to slower data transfer speeds.
Innovation Solution
A communication interface that transmits clock pulses and voltage signals through multiple pads to synchronize data transfer, allowing for the indication of operation types without additional data bits, thereby enhancing reading and writing speeds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate channels are used for command and data signals in existing communication systems like I2C, then reliable communication is achieved, but the number of pins increases and communication speed decreases
Solution Approach 1:
The patent merges command signal transmission and data signal transmission into a single communication channel by using voltage level transitions on one pad to indicate command operations (read/write start/end) while simultaneously transmitting data signals through the same pad synchronized with clock pulses. This consolidation reduces pin count while maintaining communication reliability through structured protocol design.
Solution Approach 2:
The communication pad is designed to serve multiple functions: transmitting clock pulses, bidirectional data signals, and command indicators all through the same physical channel. The interface can operate in different modes (read mode, write mode) using the same hardware resources, making the communication system more versatile and efficient.
2Ease of operation
If separate channels are used for command and data signals, then clear signal differentiation is achieved, but device complexity and pin requirements increase
Solution Approach 1:
The patent uses voltage level parameter changes to differentiate command signals from data signals within the same communication channel. Specific voltage transitions (e.g., high-to-low or low-to-high on the second pad while the first pad maintains a predetermined level) indicate command operations, while synchronized voltage changes with clock pulses represent data signals. This parameter-based differentiation maintains signal clarity without requiring separate physical channels.
3Productivity
If voltage level transitions are used to indicate operation start and end, then communication speed is improved, but signal synchronization complexity increases
Solution Approach 1:
The patent employs periodic clock pulses to synchronize data signal transmission with command operations. The master device generates regular clock pulses on the first pad, and data signals are transmitted on the second pad in synchronization with these periodic clock edges. This periodic timing structure simplifies the detection and synchronization of voltage level transitions, making the protocol easier to implement despite the increased communication speed.
Data Source
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AI summary
The master device includes a first pad connected to a slave device through a first wire; a second pad connected to the slave device through a second wire; and a communication interface to transmit a communication control signal to the slave device through the first pad, and, through the second pad, to transmit a first data signal synchronized with the communication control signal to the slave device and to receive a second data signal synchronized with the communication control signal from the slave device. The first data signal is transmitted to the slave device by the master device in a write mode and the second data signal is transmitted to the master device by the slave device in a read mode. The communication interface is configured to start the read mode by transiting the communication control signal from a first voltage level to a second voltage level while the second pad has a predetermined voltage level.