Master-Slave Status Circuit for TSV Semiconductor Package
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Solution Overview
Problem
In multi-chip semiconductor packages using the through-silicon via (TSV) technique, distinguishing between master and slave chips is challenging due to their similar constituent elements, which hinders effective control and leads to limitations in high-speed input/output operations and power consumption.
Innovation Solution
Incorporating a master-slave status circuit and initialization circuit in each chip to store and initialize signals, allowing for independent determination and inversion of signals between chips, enabling distinct control and reducing power consumption and operation latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If through-silicon via technique is used to stack multiple chips, then high-speed input/output operation is enabled, but it becomes difficult to distinguish master chip from slave chip due to similar constituent elements
Solution Approach 1:
The patent applies preliminary action by pre-configuring initialization circuits in each chip that automatically generate unique master-slave status signals during power-up. The master chip's initialization circuit outputs a first initial signal while the slave chip's outputs a second initial signal, establishing distinguishable states before any operational confusion can occur. This preliminary signal differentiation resolves the identification difficulty while maintaining the high-speed TSV architecture.
2Ease of manufacture
If identical constituent elements are used in master chip and slave chip, then manufacturing consistency is maintained, but specific configuration is required to distinguish between them
Solution Approach 1:
The patent applies local quality by making only the initialization circuit outputs locally different between master and slave chips, while all other constituent elements remain identical. The master chip's initialization circuit is configured to output a first initial signal and the slave chip's to output a second initial signal, creating a localized functional difference that enables distinction without compromising overall manufacturing consistency or requiring complex global modifications.
3Use of energy by moving object
If master-slave status circuits independently store signals, then power consumption is reduced, but operation latency may increase
Solution Approach 1:
The patent applies preliminary action by having master-slave status circuits pre-load and store initial signals (first initial signal for master, second initial signal for slave) during the power-up sequence before any data operations begin. This preliminary storage eliminates the need for real-time signal generation or repeated initialization during operations, thereby reducing ongoing power consumption while minimizing latency through advance preparation of status signals.
Data Source
AI summary
A semiconductor package including a first master-slave status circuit configured to store one of a first signal or a second signal independently from a second master-slave status circuit, store the first signal in response to receiving a first initial signal from a first initialization circuit, the second master-slave status circuit configured to store one of the first signal or the second signal, store the first signal in response to receiving a second initial signal from a second initialization circuit, the first initialization circuit configured to provide the first initial signal to the first master-slave status circuit, the second initialization circuit configured to provide the second initial signal to the second master-slave status circuit, and a first master-slave determination circuit connected to the second master-slave status circuit, the first master-slave determination circuit configured to provide the second signal to the second master-slave status circuit may be provided.