Master/Slave Timing Switch in 1000Base-T Links

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Solution Overview

Problem

Reassigning master/slave timing in data communication links, such as 1000BASE-T Ethernet, is highly disruptive to data communication as it typically requires auto-negotiation processes that take several seconds and pause payload data exchange.

Innovation Solution

A method and network node configuration that allows for reconfiguring timing relationships between physical layer devices using phase-locked loop circuitry, enabling smooth transitions between master and slave modes without communication errors, by transmitting with reference clocks and recovered clock signals, and utilizing feedthrough timing modes to maintain network synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If auto-negotiation process is used to reassign master/slave timing, then timing reconfiguration is achieved, but data communication is disrupted for several seconds

Engineering Contradiction:
Improvetiming reconfiguration capabilityVSAvoiddata communication continuity
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system performs preliminary actions by establishing feedthrough timing paths and preparing clock signal routing before the actual master/slave role transition. The slave device begins receiving and forwarding clock signals in advance, so when the transition occurs, the timing path is already prepared and data communication continues without interruption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention introduces an intermediary mechanism where the slave device temporarily acts as a clock signal forwarder during the transition period. By using feedthrough timing mode, the slave device mediates the clock signal flow between master and end devices, allowing seamless transition without disrupting data communication.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If auto-negotiation process is used to reassign master/slave timing, then timing reconfiguration is achieved, but reinitialization is required

Engineering Contradiction:
Improvetiming reconfiguration capabilityVSAvoidreinitialization time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system performs preliminary configuration of feedthrough timing paths and clock signal routing before the actual master/slave transition. By preparing the timing infrastructure in advance, the system avoids the need for reinitialization after the transition, as all necessary timing paths are already established.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention implements dynamic timing mode switching where devices can transition between normal timing mode and feedthrough timing mode without reinitialization. The system dynamically adjusts the timing behavior of devices during operation, allowing seamless master/slave reassignment while maintaining continuous data communication.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If master/slave timing is switched using conventional methods, then timing roles are reassigned, but communication errors occur

Engineering Contradiction:
Improvetiming role flexibilityVSAvoidcommunication error rate
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system maintains continuity of useful action by ensuring clock signal flow and data communication continue uninterrupted during the master/slave transition. The feedthrough timing mode allows the slave device to continuously forward clock signals throughout the transition period, preventing timing disruptions that would cause communication errors.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The slave device acts as an intermediary that temporarily forwards clock signals during the transition period. This intermediary mechanism ensures that end devices continue to receive stable clock signals throughout the master/slave reassignment, preventing timing disruptions and communication errors.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables reconfiguration of timing relationships without disrupting data communication, allowing networks to maintain synchronization and avoid reinitialization processes, thus ensuring continuous data transmission with minimal errors.

Implementation Method 1

phase-locked loop circuitry coupled to the first physical layer device and the second physical layer device, the phase-locked loop circuitry configured to produce a local clock signal based on a clock signal produced by the first physical layer device or a clock signal produced by the second physical layer device

Methodology Applied
Scientific EffectPhase-locked loop:

Data Source

PatentUSRE48130E1Method for switching master/slave timing in a 1000Base-T link without traffic disruption
Publication Date: 2020.07.28 MICROSEMI STORAGE SOLUTIONS INC
  • USRE48130E1 patent drawing
  • USRE48130E1 patent drawing
  • USRE48130E1 patent drawing

AI summary

A method switches master/slave timing in a communication network without traffic disruption. The method includes a master device informing a slave of timing loss. The master device additionally begins transmitting with timing from a local reference clock and begins receive timing recovery. The slave freezes its receive timing recovery and locks its transmit clock. The master device transitions its transmit timing to use the recovered receive clock. The slave gradually switches to transmitting using its local clock signal. The method may be used in synchronous Ethernet networks.