Matched-Cascode Millimeter-Wave Power Amplifier for High Gain Output

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Solution Overview

Problem

Existing millimeter-wavelength power amplifiers face challenges in achieving high output power and power gain due to low gain of individual amplifying cells and high loss of matching networks, leading to difficulties in reaching saturated output power while maintaining useful gain.

Innovation Solution

The proposed solution involves a matched-cascode amp-cell design with a first transistor in common source amplification mode and a second transistor in common gate amplification mode, along with inductive components to increase impedance and conductance, and a differential slot power combiner/divider to enhance output power and alleviate impedance matching issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional cascode amp-cells are used to increase supply voltage and output power, then output power is improved, but power gain deteriorates due to large inter-cell parasitic capacitance

Engineering Contradiction:
Improveoutput powerVSAvoidpower gain
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent changes the biasing parameters and impedance values in the cascode amplifier circuit. Specifically, it uses impedance transformation networks with carefully selected L and C values to adjust the operating point and reduce the impact of parasitic capacitance, thereby maintaining both high output power and acceptable power gain

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces impedance transformation networks (matching networks) as intermediary elements between the cascode amplifier stages and the load. These networks mediate the interaction between stages, transforming impedances to minimize the harmful effects of parasitic capacitance while maximizing power transfer and gain

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If series power combiners are used to raise output power, then output power is improved, but power gain deteriorates due to imbalanced input impedances from parasitic capacitors

Engineering Contradiction:
Improveoutput powerVSAvoidpower gain
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent modifies the impedance parameters of the power combiner circuit by introducing transformation networks with specific L and C values. This changes the input impedance characteristics to achieve better balance between the combined signals, reducing the degradation of power gain while maintaining high output power

Inventive Principle:
Principle #35Parameter changes

3Power

If parallel power combiners are used to raise output power, then output power is improved, but power gain deteriorates due to increased impedance transformation ratio and matching network loss

Engineering Contradiction:
Improveoutput powerVSAvoidmatching network loss
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent optimizes the impedance transformation ratio by carefully selecting the L and C values in the matching networks. This parameter adjustment reduces the transformation ratio to acceptable levels, minimizing the loss in the matching networks while still achieving the desired output power through parallel combination

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively boosts output power and power gain, allowing the power amplifier to approach the saturated output power of the amp-cells while maintaining a useful gain, thus overcoming the limitations of existing technologies.

Implementation Method 1

a first inductive component coupled between the drain terminal of the first transistor and the ground to increase the impedance between the drain terminal of the first transistor and the ground

Methodology Applied
Scientific EffectInductance: Inductor

Implementation Method 2

a second inductive component coupled between the drain terminal of the first transistor and the source terminal of the second transistor to increase the conductance in the output admittance at the output port

Methodology Applied
Scientific EffectInductance: Inductor

Data Source

PatentUS20250119109A1Millimeter-wavelength power amplifiers having both high power gain and high output power
Publication Date: 2025.04.10 RGT UNIV OF CALIFORNIA
  • US20250119109A1 patent drawing
  • US20250119109A1 patent drawing
  • US20250119109A1 patent drawing

AI summary

A power amplifier (amp) includes a first transistor configured in the common source (CS) amplification mode, wherein the gate terminal of the first transistor is the input port of the power amp; and a second transistor configured in the common gate (CG) amplification mode, wherein the drain terminal of the second transistor is the output port of the power amp. The power amp also includes a first inductive component coupled between the drain terminal of the first transistor and the ground to increase the impedance between the drain terminal of the first transistor and the ground, thereby increasing an output power at the output port. The power amp additionally includes a second inductive component coupled between the drain terminal of the first transistor and the source terminal of the second transistor to increase the conductance in the output admittance at the output port, thereby further increasing the output power.