Matched-Delay Signal Transmission for High-Speed Image Sensor Readout

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Solution Overview

Problem

In image sensors, the difference in delay times between pixel data transmission and clock signal transmission due to varying circuit configurations leads to difficulties in increasing data reading speed, as the skew between these signals is affected by process, voltage, and temperature conditions.

Innovation Solution

An electronic circuit design that synchronizes data and timing signals by using data and timing signal transmission circuits with matched delay times, including attenuation and amplification drivers, and multiphase units to ensure synchronized transmission, thereby minimizing the delay difference between data and clock signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If different circuit configurations are used for data signal transmission and timing signal transmission, then the circuit can be optimized for different signal types, but the delay time difference (skew) between data and timing signals increases

Engineering Contradiction:
Improvecircuit configuration optimizationVSAvoiddelay time matching
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by configuring the timing signal transmission circuit with the same structural characteristics as the data signal transmission circuit. Specifically, both circuits use identical numbers of drivers and amplifiers, ensuring that each signal type experiences comparable transmission conditions and delay characteristics, thereby resolving the skew issue while maintaining signal-specific optimization

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements homogeneity by making the timing signal transmission circuit structurally similar to the data signal transmission circuit. Both circuits employ the same number of attenuation drivers and amplifying units, creating uniform transmission paths that experience matched delay times despite transmitting different signal types, thus reducing skew to minimal levels

Inventive Principle:
Principle #33Homogeneity

2Productivity

If the reading speed of pixel data is increased, then the productivity improves, but the skew between data and timing signals becomes more difficult to control

Engineering Contradiction:
Improvedata reading speedVSAvoidtiming synchronization
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by adjusting the circuit configuration parameters of the timing signal transmission circuit to match those of the data signal transmission circuit. By setting the number of drivers, amplifiers, and their placement positions to be substantially the same, the delay time parameters are equalized, enabling high-speed operation while maintaining precise timing synchronization

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements equipotentiality by creating equal delay time conditions for both data and timing signals through matched circuit configurations. This ensures that both signals experience equivalent transmission delays, maintaining their temporal relationship and synchronization even at increased reading speeds, thus resolving the contradiction between speed and timing precision

Inventive Principle:
Principle #12Equipotentiality

Data Source

PatentUS10110212B2Electronic circuit, solid state image capturing apparatus and method of controlling electronic circuit
Publication Date: 2018.10.23 SONY GROUP CORP
  • US10110212B2 patent drawing
  • US10110212B2 patent drawing
  • US10110212B2 patent drawing

AI summary

There is provided an electronic circuit including a timing signal generation unit for generating a timing signal; a data signal supply unit for synchronizing with the timing signal generated to supply a data signal; a data signal transmission circuit for transmitting the data signal supplied; a timing signal transmission circuit for transmitting the timing signal generated by a circuit having a substantially same delay time as the data signal transmission circuit; and a data holding unit for synchronizing with the timing signal transmitted to hold and output the data signal transmitted. Also, there are provided a solid state image capturing apparatus and a method of controlling the electronic circuit.