Matched Transistor Pair Readout for Sensor Offset Cancellation
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Solution Overview
Problem
Existing pixel arrays and readout circuits face challenges with mismatch and offset issues due to fabrication tolerances, which affect the accuracy of chemical and biological measurements, particularly in sensors like ISFETs, where correlated double sampling is not feasible without a reset value.
Innovation Solution
The implementation of a delta double sampling method using matched transistor pairs allows for offset and mismatch correction without reset circuits, by precharging pixel outputs and sampling reference signals to cancel out offset and mismatch artifacts, enabling accurate analog-to-digital conversion and reducing the dynamic range requirements of ADCs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If correlated double sampling is used to correct offset and mismatch, then measurement precision is improved, but device complexity increases due to requirement of reset circuits
Solution Approach 1:
The patent extracts the offset and mismatch correction function from the traditional correlated double sampling method that requires reset circuits. By using a lookup table to store pre-characterized offset and mismatch values, the correction functionality is separated from the real-time sampling circuitry, eliminating the need for complex reset circuits while maintaining correction capability.
Solution Approach 2:
The patent performs offset and mismatch characterization in advance during fabrication or initialization, storing the measured values in a lookup table. This preliminary action allows the system to retrieve correction values during operation without requiring complex real-time correction circuits, thus improving measurement precision without increasing device complexity.
2Manufacturing precision
If fabrication tolerances are reduced to improve manufacturing precision, then offset and mismatch are reduced, but manufacturing cost and complexity increase
Solution Approach 1:
The patent implements a self-characterization mechanism where each pixel array element is automatically characterized for its specific offset and mismatch values during fabrication or initialization. The system uses its own resources (test circuits, lookup table memory) to store and retrieve correction parameters, eliminating the need for external manual calibration or tighter fabrication tolerances.
Solution Approach 2:
The patent changes the approach from controlling physical fabrication parameters (transistor dimensions, material properties) to controlling digital correction parameters (lookup table values). By characterizing actual offset and mismatch values and storing them digitally, the system compensates for fabrication variations without requiring tighter manufacturing precision.
3Productivity
If dynamic range of ADC is reduced to improve bit allocation efficiency, then productivity is improved, but measurement precision deteriorates
Solution Approach 1:
The patent converts the harmful effect of offset and mismatch variations into a beneficial correction process. By characterizing these variations and storing them in a lookup table, the system uses the same variations that would normally degrade precision to create correction values that, when applied, improve overall measurement accuracy while allowing reduced ADC dynamic range.
Solution Approach 2:
The patent performs preliminary characterization of offset and mismatch values and stores them in a lookup table before actual measurement operations. This preliminary action allows the system to apply corrections to each measurement, effectively extending the usable dynamic range and maintaining measurement precision even with a reduced-bit ADC.
Data Source
AI summary
An array of sensors arranged in matched pairs of transistors with an output formed on a first transistor and a sensor formed on the second transistor of the matched pair. The matched pairs are arranged such that the second transistor in the matched pair is read through the output of the first transistor in the matched pair. The first transistor in the matched pair is forced into the saturation (active) region to prevent interference from the second transistor on the output of the first transistor. A sample is taken of the output. The first transistor is then placed into the linear region allowing the sensor formed on the second transistor to be read through the output of the first transistor. A sample is taken from the output of the sensor reading of the second transistor. A difference is formed of the two samples.