Matched Transistor Pair Sampling for Sensor Offset Cancellation
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Solution Overview
Problem
Existing sensor arrays face challenges with transistor mismatch and offset issues, particularly in CMOS circuits, which lead to non-uniformity and inefficiencies in signal processing, especially when reset circuits are not available, necessitating a method to eliminate or reduce these mismatches without relying on correlated double sampling.
Innovation Solution
The implementation of a circuit using matched transistor pairs, where a row select transistor and a chemically-sensitive sensor share common properties, allowing for sampling techniques that do not require reset circuits, and an offset cancel block that takes two samples to eliminate mismatches before analog-to-digital conversion, ensuring uniformity and reducing dynamic range requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If matched transistor pairs are used with double sampling, then transistor mismatch and offset issues are reduced, but device complexity increases due to additional sampling circuitry
Solution Approach 1:
The sensor array is divided into matched transistor pairs, where each pair consists of a sensor transistor and a reference transistor. This segmentation allows independent characterization and cancellation of mismatch effects for each pair, improving measurement precision while keeping the complexity localized to small units rather than the entire array.
Solution Approach 2:
The reference transistor in each matched pair is used to pre-characterize the mismatch and offset effects before the actual sensor measurement. By taking a reference sample from the reference transistor and comparing it with the sensor transistor output, the system performs preliminary correction of systematic errors, enhancing measurement precision without requiring complex real-time correction circuits.
2Measurement precision
If reset circuits are added to eliminate mismatches, then measurement precision improves, but device complexity and power consumption increase
Solution Approach 1:
Instead of using reset circuits that modify the original sensor transistor, the invention creates a copy in the form of a reference transistor within each matched pair. This reference transistor replicates the mismatch and offset characteristics, allowing these effects to be measured and cancelled through differential sampling without requiring additional reset circuitry, thus avoiding increased device complexity.
Solution Approach 2:
The system changes the operational parameters by switching between two sampling modes: one where the reference transistor is active (to capture mismatch/offset) and one where the sensor transistor is active (to capture the actual signal). This parameter switching approach enables offset cancellation without adding permanent circuit components, maintaining simplicity while improving measurement precision.
3Measurement precision
If higher bit-depth ADCs are used, then signal processing accuracy improves, but power consumption and device complexity increase
Solution Approach 1:
The matched transistor pairs perform preliminary characterization and cancellation of mismatch and offset effects before the signal reaches the ADC. By removing systematic errors in the analog domain through double sampling, the dynamic range requirement of the ADC is reduced, allowing the use of lower bit-depth converters that consume less power while maintaining the same effective signal processing accuracy.
Data Source
AI summary
An array of sensors arranged in matched pairs of transistors with an output formed on a first transistor and a sensor formed on the second transistor of the matched pair. The matched pairs are arranged such that the second transistor in the matched pair is read through the output of the first transistor in the matched pair. The first transistor in the matched pair is forced into the saturation (active) region to prevent interference from the second transistor on the output of the first transistor. A sample is taken of the output. The first transistor is then placed into the linear region allowing the sensor formed on the second transistor to be read through the output of the first transistor. A sample is taken from the output of the sensor reading of the second transistor. A difference is formed of the two samples.