Matching Circuit Board Layout to Suppress Metal Paste Migration
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Solution Overview
Problem
In semiconductor devices, the migration of metal paste, particularly silver paste, occurs due to negative electric fields, leading to ion migration issues when used in matching circuit components.
Innovation Solution
A matching circuit board design featuring substrates with insulators and metal patterns, where conductive vias are strategically positioned to reduce electric field leakage and create capacitors and inductors, ensuring the metal patterns are insulated from conductive vias, thereby minimizing electric field exposure and preventing metal paste migration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If metal paste is used in matching circuit components, then the circuit can be manufactured with conventional processes, but metal paste migration occurs due to negative electric fields
Solution Approach 1:
The patent removes the problematic metal paste material from the matching circuit components and replaces it with a metal pattern formed by conventional PCB techniques. This extraction eliminates the migration issue while preserving the circuit's manufacturing ease, as the new structure uses standard PCB fabrication processes rather than specialized paste application methods
Solution Approach 2:
The patent changes the physical and chemical parameters of the conductive material by transitioning from metal paste (organic binder-based) to metal pattern (pure metal trace). This parameter change eliminates the migration phenomenon while maintaining electrical functionality, as the metal pattern does not exhibit the same migration characteristics as paste materials under electric fields
2Volume of moving object
If conductive vias are positioned close to metal patterns for compact design, then device size is reduced, but electric field leakage increases causing metal paste migration
Solution Approach 1:
The patent converts the potentially harmful electric field leakage into a beneficial shielding effect by strategically positioning conductive vias to form a Faraday cage around the metal pattern. The electric fields between conductors are utilized to create a controlled electromagnetic environment that prevents external field interference and contains internal fields, thereby preventing paste migration while maintaining compact dimensions
Solution Approach 2:
The patent implements a nested structure where conductive vias are positioned to surround and enclose the metal pattern, creating a protective electromagnetic shield. This nesting arrangement allows the via structure to contain the metal pattern within a shielded zone, reducing electric field leakage to external regions while maintaining a compact overall device footprint
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively suppresses metal paste migration by reducing electric field leakage, ensuring reliable operation of semiconductor devices even under negative voltage conditions.
Implementation Method 1
a first capacitor is constituted by the first metal pattern, the second insulator, and the second metal pattern
Implementation Method 2
a second capacitor is constituted by the first metal pattern, the first insulator, and the third metal pattern
Implementation Method 3
The second metal pattern is electrically connected to the third metal pattern through the plurality of second conductive vias and the plurality of first conductive vias
Implementation Method 4
The first substrate includes a first insulator, a first metal pattern provided on a main surface of the first insulator
Data Source
AI summary
A matching circuit board includes a first substrate, a second substrate, and a third substrate. The first substrate includes a first insulator, a first metal pattern, and first conductive vias. The second substrate includes a second insulator, a second metal pattern, and second conductive vias. The third substrate includes a third insulator and a third metal pattern. A capacitor is constituted by the first metal pattern, the second insulator, and the second metal pattern, and a capacitor is constituted by the first metal pattern, the first insulator, and the third metal pattern. The second metal pattern is electrically connected to the third metal pattern through the second conductive vias and the first conductive vias. The first metal pattern is separated from the first conductive vias to be positioned inside the first conductive vias, and is insulated from the first conductive vias.