Matching Free Dynamic Digital Pixel Sensor for CMOS Image Arrays
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Solution Overview
Problem
CMOS active pixel sensors face challenges with transistor mismatch in comparators leading to fixed pattern noise and high power consumption, making it difficult to achieve high-quality images with compact and cost-effective A-D conversion in large sensor arrays, especially in portable applications.
Innovation Solution
The use of a single transistor input stage for both signal and reference signals in the comparator, along with sharing comparator circuitry among pixels and employing a cascaded comparator structure to reduce transistor count and power consumption, while minimizing offset voltage issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a differential pair of transistors is used in the comparator for A-D conversion, then the comparator can function properly, but transistor mismatch causes fixed pattern noise and reduces image quality
Solution Approach 1:
The patent merges the reference signal path with the signal path by using the same transistor (M3) for both signal and reference inputs. This eliminates the need for a separate differential pair transistor (M4) and its associated mismatch problems, while maintaining comparator functionality through the dynamic comparison architecture.
Solution Approach 2:
The patent uses capacitor C0 to store and replicate the reference voltage level, allowing the same physical transistor to be used for both signal and reference comparison without requiring matched transistor pairs. The capacitor acts as a temporary copy of the reference state.
2Area of stationary object
If distributed A-D conversion is embedded inside each pixel, then the sensor array size is reduced, but the number of transistors per pixel increases
Solution Approach 1:
The patent merges the A-D conversion function directly into the pixel circuit, eliminating the need for separate off-array A-D converters and their associated multiplexing circuitry. The dynamic comparator uses a minimal transistor count (sharing M3 and M4 with other pixels) to achieve in-pixel conversion without significantly increasing per-pixel complexity.
Solution Approach 2:
The patent makes transistors M3 and M4 serve multiple functions: they act as switching transistors during the integration phase and as comparator transistors during the conversion phase. This multi-functionality reduces the need for dedicated comparator transistors in each pixel.
3Device complexity
If dynamic comparators are used to reduce transistor count, then device size is reduced, but offset voltage issues may arise
Solution Approach 1:
The patent employs periodic clock signals (CLK1, CLK2) to control the dynamic comparator operation, systematically switching between signal input phase and reference input phase. This periodic operation allows the capacitor to be charged and discharged in a controlled manner, eliminating DC offset accumulation while maintaining low transistor count.
Solution Approach 2:
The patent extracts the offset voltage issue from the transistor level and addresses it at the circuit level through the dynamic comparison architecture. By using capacitors to store voltage levels and switching between them periodically, the design eliminates transistor mismatch offsets without requiring additional correction circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach eliminates fixed pattern noise due to transistor mismatch and reduces power consumption, enabling high-quality image capture with a smaller silicon layout and lower costs, suitable for both compact and portable imaging applications.
Implementation Method 1
The active pixel sensor includes a photodiode acting as a light sensing means. The photo-generated current is being integrated on the self-capacitance of the photodiode.
Data Source
AI summary
An active pixel sensor includes a photosensitive device and a dynamic comparator that when coupled with a voltage ramp will form a digital pixel sensor with pulse width modulated digital output. A number of switches are included in the digital pixel sensor to configure the input of the dynamic comparator to couple with the photosensitive device or the voltage ramp such that the dynamic comparator is free from input transistor mismatch problem, as both input use the same input transistor. A cascade of dynamic comparator is disclosed in this invention, such as to improve the sensitivity and conversion speed of the digital pixel sensor. There are a number of switches that connect and isolate the digital pixel sensor from the bit line, which is shared by a plurality of digital pixel sensors in the sensor array. Photosensitive devices in close proximity can share the dynamic comparator by a number of selection switches, such that each photosensitive device can be read out in a time shared manner. Such configuration reduce the average number of transistors in each digital pixel sensor and thus the total silicon area of the sensor array, and hence the cost of production of the image sensor.