Matrix Accelerator with Sparse Data Check Device

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Solution Overview

Problem

Specialized computing hardware is inefficient when performing matrix computations with a substantial proportion of zero-valued elements, as it incurs higher power costs and energy expenditure by processing sparse data in the same manner as dense data, leading to suboptimal handling of mixed dense and sparse matrix data.

Innovation Solution

Implementing a sparse data check device to distinguish between dense and sparse operands within the accelerator pipeline, forwarding dense operations to a dense computation device and sparse operations to a sparse computation device, thereby optimizing energy consumption and reducing unnecessary computations on zero-valued elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If specialized computing hardware processes all matrix operations uniformly, then hardware simplicity is maintained, but energy efficiency deteriorates when processing sparse data

Engineering Contradiction:
Improveenergy efficiencyVSAvoidhardware complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The computing hardware is segmented into multiple specialized processing units: dense matrix processing units for handling dense operands and sparse matrix processing units for handling sparse operands. This segmentation allows each unit to be optimized for its specific data type, improving energy efficiency without requiring complete hardware redesign

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically routes matrix operations to appropriate processing units based on the sparsity characteristics of the input data. The routing mechanism adapts operation distribution in real-time, directing dense operations to dense processors and sparse operations to sparse processors, thereby optimizing energy consumption adaptively

Inventive Principle:
Principle #15Dynamics

2Speed

If dense computation methods are used for sparse matrix operations, then computational simplicity is maintained, but processing speed deteriorates due to unnecessary computations on zero-valued elements

Engineering Contradiction:
Improveprocessing speedVSAvoidcomputation complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The sparse computation method extracts and processes only the non-zero elements of sparse matrices, eliminating unnecessary computations on zero-valued elements. This extraction approach significantly reduces the number of arithmetic operations required while maintaining computational accuracy

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Different computation strategies are applied to different regions of the matrix based on local sparsity characteristics. Dense regions are processed using standard dense computation methods, while sparse regions use optimized sparse computation methods that skip zero elements, achieving optimal processing speed

Inventive Principle:
Principle #3Local quality

3Productivity

If a single computation device handles both dense and sparse operations, then device simplicity is maintained, but productivity deteriorates due to suboptimal handling of mixed data types

Engineering Contradiction:
Improvecomputational throughputVSAvoiddevice architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The computational system is divided into separate dense computation devices and sparse computation devices, each specialized for handling specific data types. This segmentation enables parallel processing of dense and sparse operations, significantly improving overall computational throughput

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The accelerator architecture is designed with multi-functional capability to handle both dense and sparse matrix operations through different processing paths. The system maintains universality by providing a unified interface that automatically routes different operation types to appropriate specialized units, achieving high productivity for mixed workloads

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11562047B2Accelerator for dense and sparse matrix computations
Publication Date: 2023.01.24 MICROSOFT TECHNOLOGY LICENSING LLC
  • US11562047B2 patent drawing
  • US11562047B2 patent drawing
  • US11562047B2 patent drawing

AI summary

A method of increasing computer hardware efficiency of a matrix computation. The method comprises receiving at a computer processing device, digital signals encoding one or more operations of the matrix computation, each operation including one or more operands. The method further comprises, responsive to determining, by a sparse data check device of the computer processing machine, that an operation of the matrix computation includes all dense operands, forwarding the operation to a dense computation device of the computer processing machine configured to perform the operation of the matrix computation based on the dense operands. The method further comprises, responsive to determining, by the sparse data check device, that an operation of the matrix computation includes one or more sparse operands, forwarding the operation to a sparse computation device configured to perform the operation of the matrix computation.