Matrix DAC Cell Sequencing for Low-DNL Audio Frequency Control
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Solution Overview
Problem
Matrix digital-to-analog converters (DACs) face challenges in achieving low differential nonlinearity (DNL) and fine frequency resolution, leading to audible artefacts due to large step changes in digitally controlled oscillators (DCOs), particularly in audio applications, where the increase in control signals results in parasitic coupling and DNL errors.
Innovation Solution
A matrix DAC architecture with a decoding circuitry that controls local decoders to transition cells in a sequence, ensuring that each incremental change results in a single cell transition, with the path proceeding to adjacent cells at least 50% of the time, minimizing physical distance and using Gray coding to reduce switching activity and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a thermometer current DAC is used to achieve low DNL, then differential nonlinearity is reduced, but the number of control signals increases leading to parasitic coupling
Solution Approach 1:
The DAC is divided into multiple sub-DACs arranged in a matrix configuration, where each sub-DAC handles a portion of the total control signals. This segmentation reduces the number of control signals required for each individual sub-DAC while maintaining the overall low DNL performance through coordinated operation of all sub-DACs
Solution Approach 2:
The control signal space is extended from one dimension to two dimensions by arranging sub-DACs in a matrix with row and column indices. This allows the total number of control signals to be reduced from N to approximately 2√N by utilizing the second dimension (matrix columns) to encode additional control information
2Measurement precision
If the number of bits in the DAC increases to achieve fine frequency resolution, then frequency resolution is improved, but parasitic coupling of control signals increases
Solution Approach 1:
High-resolution DAC functionality is achieved by segmenting the system into multiple lower-resolution sub-DACs operating in parallel. Each sub-DAC requires fewer control signals, reducing parasitic coupling, while the combined output of all sub-DACs provides the required high frequency resolution
Solution Approach 2:
The control signal requirements for high-resolution conversion are distributed across two dimensions (rows and columns of the matrix), reducing the linear number of control signals needed while maintaining the exponential frequency resolution capability
3Device complexity
If large step changes in DCO output are used, then the DAC architecture is simpler, but audible artefacts are generated
Solution Approach 1:
The total frequency adjustment range is divided into multiple smaller steps across the matrix of sub-DACs. Each individual step change is small and inaudible, while the cumulative effect across multiple sub-DACs achieves the desired large frequency adjustment without generating audible artefacts
Solution Approach 2:
Instead of making a single large step change that would cause audible artefacts, the system applies multiple smaller partial adjustments through different sub-DACs. The sum of these partial actions achieves the required frequency change while keeping each individual step below the audible threshold
Data Source
AI summary
Digital-to-analog converter (DAC) architecture, comprising: a matrix DAC array comprising a plurality of cells arranged in a first dimension and a second dimension, each cell comprising a local decoder configured to transition the cell between at least two states; and decoding circuitry configured to: receive a digital input signal; and control the plurality of local decoders based on a received digital input signal, wherein each incremental change in the digital input signal results in a transition of a single cell of the plurality of cells such that the plurality of cells transition in sequence, the sequence of transitions of the plurality of cells defining a path through the DAC array; wherein when the path proceeds in the first dimension, the path proceeds to an adjacent cell of the plurality of cells at least 50% of the time; and wherein when the path proceeds in the second dimension, the path proceeds to an adjacent cell of the plurality of cells at least 50% of the time.