Sparse Matrix Multiply Kernel With Pattern-Tracked Zero Bypass

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Solution Overview

Problem

Current parallel graphics data processing systems face inefficiencies in handling sparse matrix operations, particularly in machine learning applications, due to the processing of zero-value operands and the need for dense matrix computations, which can lead to increased processing loads and reduced performance.

Innovation Solution

The implementation of a sparse matrix processing mechanism that includes a scheduler to identify and prevent the processing of zero-value operands, a pattern tracker to detect sparse segments, and compression logic to store frequently used sparse matrices in a compressed buffer, allowing for efficient execution and reducing unnecessary computations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If dense matrix computation is used to ensure compatibility with standard linear algebra operations, then computational completeness is improved, but processing load increases and performance decreases for sparse data

Engineering Contradiction:
Improvecomputational completenessVSAvoidprocessing efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system applies different computation strategies to different parts of the matrix data. Dense computation is used when necessary for compatibility, while sparse computation is used for sparse segments to improve efficiency. This local differentiation resolves the contradiction by adapting the computation method to the local data characteristics rather than applying a uniform approach.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The computation mechanism dynamically switches between dense and sparse processing modes based on the detected sparsity patterns in the input data. The system can adapt its processing approach in real-time, selecting the appropriate computation method for each operation, thereby maintaining both computational completeness and processing efficiency.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If all operands are processed to ensure complete computation, then computational accuracy is improved, but processing time increases due to unnecessary zero-value operations

Engineering Contradiction:
Improvecomputational accuracyVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system extracts and identifies zero-value operands from the input data using pattern tracking logic. By separating the zero-value elements from non-zero elements, the system can exclude zero-value operands from computation, thereby reducing processing time while maintaining computational accuracy for the relevant non-zero data.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of processing all operands completely, the system performs partial processing by identifying and skipping zero-value operands. This partial action approach maintains computational accuracy for necessary operations while avoiding the excessive processing of redundant zero-value data, thus reducing overall processing time.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If sparse matrix optimization is implemented to improve processing efficiency, then throughput is improved, but device complexity increases due to additional logic components

Engineering Contradiction:
ImprovethroughputVSAvoidprocessing architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system merges the sparse processing functionality with the existing graphics processing architecture by integrating pattern tracking logic and compression mechanisms into the existing pipeline. This merging approach allows sparse matrix optimization to be implemented without creating entirely separate processing paths, thereby improving throughput while limiting the increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The processing elements are designed to perform multiple functions - they can handle both dense and sparse matrix operations depending on the input data characteristics. This multi-functionality allows the same hardware to adapt to different computation needs, improving throughput for sparse operations without requiring dedicated sparse processing units that would increase device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Quantity of substance

If compression logic is added to store sparse matrices in compressed buffer, then memory efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvememory usageVSAvoidprocessing architecture complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The system performs preliminary compression of sparse matrix data before storing it in the buffer. By pre-processing the data to remove redundancy and compress it, the system reduces memory usage requirements. This preliminary action is integrated into the data input stage, so the compression functionality is utilized without requiring complex real-time decompression mechanisms during processing.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11803935B2Machine learning sparse computation mechanism
Publication Date: 2023.10.31 INTEL CORP
  • US11803935B2 patent drawing
  • US11803935B2 patent drawing
  • US11803935B2 patent drawing

AI summary

Techniques to improve performance of matrix multiply operations are described in which a compute kernel can specify one or more element-wise operations to perform on output of the compute kernel before the output is transferred to higher levels of a processor memory hierarchy.