Matrix LED Interconnection on Single Substrate

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Solution Overview

Problem

The existing methods for connecting multiple LED chips in series for light emitting devices require additional processes such as substrate separation, packaging, and wiring, leading to increased manufacturing time and cost.

Innovation Solution

A light emitting device with a substrate and interconnection layers connecting multiple LED structures in a matrix form, using conductive nitride semiconductor layers and electrodes, allowing for series connection without the need for separate substrate separation and packaging processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If individual LED chips are connected in series through substrate separation and packaging processes, then reliable series connection is achieved, but manufacturing time and cost increase

Engineering Contradiction:
Improveconnection reliabilityVSAvoidmanufacturing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent combines multiple LED chips and their interconnection structures onto a single substrate, eliminating the need for separate substrate separation and packaging processes. The interconnection layers are integrated directly with the LED chip array, creating a unified structure that reduces manufacturing steps while maintaining connection reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The interconnection layers are formed in advance during the chip fabrication process, before the chips are individually packaged or mounted. This preliminary formation of connection structures eliminates subsequent wiring steps and reduces overall manufacturing time while ensuring reliable electrical connections between chips.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If individual LED chips are connected in series through separate packaging and wiring processes, then proper electrical connection is achieved, but manufacturing cost increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the interconnection structures with the LED chip array on a single substrate, eliminating the need for separate packaging and wiring operations. This integration reduces material costs and processing expenses while maintaining proper electrical connections between all LED chips in the series configuration.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If multiple LED chips are processed individually through substrate separation, then chip independence is achieved, but process complexity increases

Engineering Contradiction:
Improvechip independenceVSAvoidprocess complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the LED array into multiple independent LED chip structures that can be individually addressed and controlled, while maintaining their electrical connections through integrated interconnection layers. This segmentation provides chip independence for versatility while the unified substrate structure simplifies the overall manufacturing process.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11069845B2Light emitting device
Publication Date: 2021.07.20 SAMSUNG ELECTRONICS CO LTD
  • US11069845B2 patent drawing
  • US11069845B2 patent drawing
  • US11069845B2 patent drawing

AI summary

A light emitting device includes a substrate extending in a first direction and a second direction, first through fourth light emitting structures spaced apart from each other in the first and second direction and arranged in a matrix form on the substrate, a plurality of first interconnection layer structures connecting the first light emitting structure to the second light emitting structure, a second interconnection layer structure connecting the second light emitting structure to the third light emitting structure, and a plurality of third interconnection layer structures connecting the third light emitting structure to the fourth light emitting structure.