Matrix Operation Program Cache Block Segmentation

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Solution Overview

Problem

The computational complexity of pattern mining processing increases exponentially with the number of products to be combined, leading to significant slowdowns in large-scale data analysis, as evident in the need to investigate numerous combinations of product pairs and their purchase patterns.

Innovation Solution

A matrix operation program and method that divides the matrix into column groups based on data size and storage capacity, allowing for parallel processing within the L2 cache before accessing the main memory, thereby reducing cache misses and enhancing processing speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the matrix operation processes all column combinations sequentially by accessing the main memory, then the processing is simple to implement, but the processing time increases significantly due to frequent cache misses

Engineering Contradiction:
Improveprocessing speedVSAvoidmemory access time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides the matrix columns into multiple blocks, where each block can be independently processed. By segmenting the column combinations into blocks that fit within L2 cache capacity, the system reduces the frequency of main memory accesses while maintaining processing completeness. This segmentation allows hot data to remain in faster cache memory during processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent pre-loads column blocks into the L2 cache before processing begins. By anticipating which columns will be needed and loading them into cache memory in advance, the system minimizes runtime memory access delays. This preliminary action ensures that frequently accessed column data is already in fast cache memory when processing starts.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If the entire matrix is loaded into L2 cache, then memory access time is reduced, but the storage capacity requirement increases beyond practical limits

Engineering Contradiction:
Improvecache access timeVSAvoidcache storage capacity
Core Design Contradiction:
Loss of timeVSQuantity of substance

Solution Approach 1:

The patent segments the matrix columns into multiple manageable blocks that individually fit within L2 cache capacity. Instead of loading the entire matrix at once, only the necessary column blocks are loaded into cache for each processing stage. This segmentation makes it feasible to work with large matrices that would otherwise exceed cache memory limits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent processes column combinations in partial batches rather than all at once. By processing a subset of column combinations using only the necessary column blocks currently in cache, the system achieves sufficient processing without requiring the entire matrix to reside in cache simultaneously. This partial action approach balances cache usage with processing needs.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20240095303A1Computer-readable recording medium storing matrix operation program, matrix operation method, and information processing apparatus
Publication Date: 2024.03.21 FUJITSU LTD
  • US20240095303A1 patent drawing
  • US20240095303A1 patent drawing
  • US20240095303A1 patent drawing

AI summary

A computer-readable recording medium stores a matrix operation program for a computer. In a matrix operation in which an arithmetic circuit executes processing that combines at least two columns included in a matrix, obtains a product of each of rows of the combined columns, and calculates a sum of the product of each of the rows for all combinations of columns in the matrix, the program causes the computer to divide the matrix into blocks of a column group based on a data size of the column and storage capacity of a second storage to be accessed by the arithmetic circuit prior to accessing a first storage that stores information related to the matrix such that the column group to be combined is contained in the second storage, and to execute the calculation processing for each block of the divided column group.