Matrix PLL Quadrature Error Correction for Stable Clock Recovery

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-speed chip-to-chip communication systems face challenges in maintaining accurate clock recovery and phase alignment due to noise, interference, and varying signal propagation conditions, which affect the reliability and efficiency of data detection.

Innovation Solution

The implementation of a matrix phase lock loop (PLL) system that generates multiple phases of a local oscillator signal, compares these phases with received reference clock phases using a loop error matrix phase comparator, and adjusts delay stages based on quadrature error signals to achieve stable phase alignment and improved clock recovery.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional phase lock loop is used for clock recovery, then the system can maintain basic phase alignment, but the clock recovery accuracy and stability deteriorate under noise and interference conditions

Engineering Contradiction:
Improveclock recovery accuracyVSAvoidnoise and interference
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent segments the phase comparison function into multiple independent comparators, each handling specific phase relationships. The matrix phase comparator divides the comparison task across multiple elements that evaluate different phase combinations simultaneously, improving accuracy under noise by distributing the measurement function across multiple independent evaluation paths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from conventional single-dimension phase comparison to multi-dimensional phase analysis by implementing a matrix structure that simultaneously compares multiple phase relationships. This dimensional expansion allows the system to extract more information from the same signal, improving clock recovery accuracy by analyzing phase relationships across multiple dimensions rather than a single comparison path.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple phases of local oscillator signal are generated and compared using matrix phase comparator, then the stability and accuracy of clock recovery improve, but the device complexity increases

Engineering Contradiction:
Improveclock recovery stabilityVSAvoidmatrix phase comparator structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The matrix phase comparator is designed as a universal structure that can simultaneously perform multiple phase comparison functions. Each comparator element serves multiple purposes by evaluating different phase relationships, allowing the system to achieve high reliability through comprehensive phase analysis while avoiding the need for separate dedicated comparators for each function, thus managing complexity through multi-functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges multiple phase comparison operations into a single integrated matrix phase comparator structure. By combining what would traditionally require separate comparison circuits into one unified matrix structure, the system achieves high reliability through comprehensive phase evaluation while reducing the overall device complexity that would result from having multiple independent comparator circuits.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If delay stages are adjusted based on quadrature error signals, then deterministic jitter is reduced and bandwidth increases, but the system requires more sophisticated error correction mechanisms

Engineering Contradiction:
Improvephase alignment accuracyVSAvoiderror correction mechanism
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system implements feedback by using the quadrature error signals generated from matrix phase comparison to adjust the delay stages. The error signals provide continuous feedback information about phase misalignment, and the delay stage adjustments based on this feedback progressively reduce deterministic jitter and improve phase alignment accuracy, creating a self-correcting system that manages complexity through automated feedback control.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10686584B2Quadrature and duty cycle error correction in matrix phase lock loop
Publication Date: 2020.06.16 KANDOU LABS SA
  • US10686584B2 patent drawing
  • US10686584B2 patent drawing
  • US10686584B2 patent drawing

AI summary

Generating, at a plurality of delay stages of a local oscillator, a plurality of phases of a local oscillator signal, generating a loop error signal based on a comparison of one or more phases of the local oscillator signal to one or more phases of a received reference clock, generating a plurality of phase-specific quadrature error signals, each phase-specific quadrature error signal associated with a respective phase of the plurality of phases of the local oscillator signal, each phase-specific quadrature error signal based on a comparison of the respective phase to two or more other phases of the local oscillator signal, and adjusting each delay stage according to a corresponding phase-specific quadrature error signal of the plurality of phase-specific quadrature error signals and the loop error signal.