Matrix Rectifier PWM Scheme for Duty Cycle Loss Reduction
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Solution Overview
Problem
Existing three-phase rectifier converters face challenges with duty cycle loss, increased total harmonic distortion (THD), and reduced efficiency at light loads due to large leakage inductance requirements for zero-voltage switching (ZVS), which limits conversion efficiency and power density.
Innovation Solution
The proposed PWM scheme operates matrix rectifiers with independent full-bridge phase-shifted converters in each 60° interval, using specific vector sequences and dwell times to minimize duty cycle loss, reduce peak output inductor current ripple, and achieve unity power factor and output-voltage regulation, thereby reducing THD and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large leakage inductance is used to extend zero-voltage switching at light load, then zero-voltage switching is achieved, but total harmonic distortion increases
Solution Approach 1:
The patent changes the PWM scheme parameters and switching sequences to achieve zero-voltage switching without requiring large leakage inductance. By modifying the modulation approach and switch timing, the system maintains ZVS capability while reducing the harmful THD effect.
2Duration of action of moving object
If series inductor is used to reduce effective duty ratio and extend commutation time, then commutation time is extended, but output inductor size increases
Solution Approach 1:
The patent modifies the PWM parameters and switching sequences to achieve adequate commutation time without requiring additional series inductors. By optimizing the duty ratio and switching timing, the system extends commutation duration while avoiding the need for larger output inductors.
3Speed
If duty cycle loss occurs at higher switching frequency, then switching frequency increases, but conversion efficiency decreases
Solution Approach 1:
The patent optimizes the PWM parameters and switching sequences to minimize duty cycle loss effects. By carefully managing switch timing and duration, the system maintains high conversion efficiency even at higher switching frequencies where duty cycle loss would normally be problematic.
4Ease of operation
If conventional PWM scheme is used with two full-bridge phase-shifted converters, then power factor correction is achieved, but peak output inductor current ripple increases
Solution Approach 1:
The patent modifies the PWM parameters and switching sequences to reduce peak output inductor current ripple while maintaining power factor correction capability. By optimizing the duty ratios and switching timing of the two full-bridge converters, the system achieves smoother current waveforms with lower peak ripple.
Data Source
AI summary
A matrix rectifier includes a bridge x defined by phases A and B and a bridge y defined by phases A and C, in which each input phases A, B, and C includes two bi-directional switches connected in series. A method of operating the matrix rectifier includes operating the bridges x and y as independent full-bridge phase-shifted converters in each 60° interval between two successive zero-voltage crossings of the input phases A, B, and C. In a first 30° sector of each 60° interval, the bridges x and y are operated in a first vector sequence in every switching period, and the first vector sequence is divided into a sequence of x+, y+, 0, x<sup2>−</sup2>, y<sup2>−</sup2>, 0.