Matrix Register Transposition With Fewer Processor Instructions

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Solution Overview

Problem

Current matrix transposition methods in high-performance computing applications using scalar or vector registers are inefficient, requiring a large number of instructions and leading to low efficiency.

Innovation Solution

Utilizing a matrix register to store and read matrix data in a two-dimensional form, allowing for reduced instructions through row-by-row or column-by-column operations, thereby improving transposition efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If scalar or vector registers are used for matrix transposition, then the processor can handle matrix operations, but the number of instructions increases and efficiency decreases

Engineering Contradiction:
Improvematrix transposition efficiencyVSAvoidnumber of instructions
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent transitions from using scalar or vector registers (one-dimensional data structures) to using a matrix register (two-dimensional data structure) for storing and processing matrix data. This dimensional change allows the processor to directly manipulate matrix elements in their natural two-dimensional arrangement, reducing the number of instructions needed for transposition operations while improving computational efficiency

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of time

If scalar or vector registers are used for matrix transposition, then the processor can perform the operation, but the operation time increases

Engineering Contradiction:
Improvematrix transposition timeVSAvoidtransposition speed
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

By introducing a matrix register that stores data in a two-dimensional form matching the natural structure of matrix operations, the patent enables more direct and efficient data access patterns. This eliminates the need for complex instruction sequences required when using flat scalar or vector registers, thereby reducing operation time and increasing transposition speed

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The matrix register is designed to pre-organize matrix data in a two-dimensional layout that anticipates transposition needs. By maintaining data in this optimized structure, the processor can perform transposition operations more quickly without requiring extensive preliminary data reorganization or complex instruction sequences

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260079705A1Matrix Operation Method, Processor, and Computing Device
Publication Date: 2026.03.19 HUAWEI TECH CO LTD
  • US20260079705A1 patent drawing
  • US20260079705A1 patent drawing
  • US20260079705A1 patent drawing

AI summary

A matrix operation method is performed by a processor including a matrix register. In the matrix operation method, data of a first matrix to be transposed may be stored in the matrix register, where the first matrix includes N rows and M columns. The matrix register stores the data of the first matrix in a two-dimensional form of N rows and M columns. Then, the data of the first matrix may be read from the matrix register in a row-by-row or column-by-column manner to obtain data of a second matrix obtained by transposing the data of the first matrix, where the second matrix includes M rows and N columns.