Active Matrix Substrate Layout for LCD Flicker Suppression
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Solution Overview
Problem
Liquid crystal display devices experience flicker and reduced display quality due to parasitic capacitance, particularly during low-frequency driving, which is challenging to address through conventional methods that control material properties and driving methods alone.
Innovation Solution
The active matrix substrate design incorporates oxide semiconductor TFTs with additional parasitic capacitances formed by overlapping pixel electrodes and oxide semiconductor layers, allowing for controlled balance between own and other source parasitic capacitances, reducing the β value and thereby minimizing flicker while maintaining high aperture ratio and light utilization efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If low-frequency driving is performed to reduce power consumption, then power consumption is reduced, but flicker occurs due to parasitic capacitance causing pixel potential fluctuations
Solution Approach 1:
The patent intentionally introduces parasitic capacitance between the pixel electrode and oxide semiconductor layer to counterbalance the harmful parasitic capacitance between pixel electrode and source bus line. By converting the typically harmful parasitic capacitance effect into a beneficial counterbalancing mechanism, the fluctuations in pixel potential during pause periods are reduced, thereby suppressing flicker while maintaining low-frequency driving operation
Solution Approach 2:
The patent modifies the electrical parameters of the pixel structure by controlling the overlap area between pixel electrode and oxide semiconductor layer to adjust the parasitic capacitance value. This parameter change allows optimization of the capacitance balance to minimize pixel potential fluctuations during low-frequency driving
2Use of energy by moving object
If aperture ratio is increased to improve light utilization efficiency, then light utilization efficiency is improved, but parasitic capacitance effects are exacerbated
Solution Approach 1:
The patent utilizes the parasitic capacitance that inevitably increases with larger aperture ratio by positioning the oxide semiconductor layer to create a beneficial parasitic capacitance between pixel electrode and oxide semiconductor layer. This converts the harmful effect of increased parasitic capacitance from larger aperture into a useful counterbalancing mechanism that reduces pixel potential fluctuations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces flicker and maintains high display quality by canceling out brightness changes between pixel sets, offering design flexibility and improved performance even at high pixel densities.
Implementation Method 1
parasitic capacitance causes fluctuations in pixel potential
Implementation Method 2
additional parasitic capacitances formed by overlapping pixel electrodes and oxide semiconductor layers
Data Source
AI summary
An active matrix substrate includes pixel regions each including a pixel electrode and an oxide semiconductor TFT including an oxide semiconductor layer. Each pixel electrode is electrically connected to one of adjacent two of source bus lines. The oxide semiconductor layer in the oxide semiconductor TFT of each pixel region overlaps the pixel electrode of a first adjacent pixel region. The pixel electrode of the each pixel region partially overlaps the oxide semiconductor layer in a second adjacent pixel region. The source bus lines include first and second source bus lines adjacent to each other. Pixels sets each including two pixel regions whose pixel electrodes are connected to the first source bus line and pixel sets each including two pixel regions whose pixel electrodes are connected to the second source bus line are arranged alternately between the first and second source bus lines.