MBC Memory Polarity Control for Programming Optimization
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Solution Overview
Problem
Conventional multiple-bit per cell (MBC) memory systems face challenges in reducing the number of programming states, leading to increased programming time and power consumption, while also introducing potential errors due to tightened threshold voltage margins.
Innovation Solution
A non-volatile memory apparatus and method that utilizes a memory array with electrically erasable blocks and reprogrammable pages, where upper and lower pages share common word-lines, and MBC memory cells have threshold voltages programmable to specific levels, with a controller that selectively inverts data to maximize bits in the lower page and minimize bits in the upper page, reducing the number of highest programming states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple threshold voltage levels are created to store multiple bits per cell, then data storage capacity is improved, but programming time increases
Solution Approach 1:
The patent divides the programming operation into two distinct phases: a first programming phase that programs all cells to an intermediate threshold voltage level, and a second programming phase that programs only the remaining bits to their final levels. This segmentation allows the most time-consuming operations to be performed in parallel during the first phase, while the second phase operates on fewer cells, thereby reducing total programming time while maintaining multi-bit storage capacity.
Solution Approach 2:
The patent performs preliminary programming of all cells to an intermediate threshold voltage level before performing the final programming to distinct threshold voltage levels. This preliminary action prepares the cells in advance, so that when the final programming is needed, the cells are already close to their target states, reducing the time required for the critical final programming operation.
2Quantity of substance
If multiple threshold voltage levels are created to store multiple bits per cell, then data storage capacity is improved, but power consumption increases
Solution Approach 1:
The patent segments the programming operation into two phases where the first phase programs all cells to an intermediate level, and the second phase programs only the remaining bits. This segmentation reduces power consumption because the high-power programming operation is performed on all cells once to reach the intermediate state, and then only on a subset of cells for the final adjustment, rather than performing multiple full-programming operations on all cells.
Solution Approach 2:
The patent uses partial action by programming cells to an intermediate threshold voltage level that is sufficient for the first programming phase, and then only programming the remaining bits in the second phase. This avoids performing excessive programming operations on all cells, thereby reducing overall power consumption while achieving the same data storage capacity.
3Measurement precision
If threshold voltage margins are tightened to differentiate adjacent levels, then measurement precision is improved, but reliability deteriorates
Solution Approach 1:
The patent segments the threshold voltage range into two parts: an intermediate level that serves as a common state for all cells after the first programming phase, and distinct final levels for the second programming phase. This segmentation creates larger effective margins between the intermediate state and the final states, improving reliability while still allowing precise differentiation of all threshold voltage levels through the two-phase reading process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a tighter distribution of programmed cell threshold voltages, reduced power consumption, and enhanced device reliability compared to existing methods, while also decreasing programming time.
Implementation Method 1
This causes electrons to tunnel or be injected from a channel region to a floating gate
Implementation Method 2
This causes electrons to tunnel or be injected from a channel region to a floating gate
Implementation Method 3
The amount of charge residing on the floating gate determines the voltage required on the control gate in order to cause the device to conduct current between the source and drain regions. This voltage is termed the threshold voltage, Vth, of the cell.
Data Source
AI summary
A Multiple-bit per Cell (MBC) non-volatile memory apparatus, method, and system wherein a controller for writing/reading data to/from a memory array controls polarity of data by selectively inverting data words to maximize a number of bits to be programmed within (M−1) virtual pages and selectively inverts data words to minimize a number of bits to be programmed in an Mth virtual page where M is the number of bits per cell. A corresponding polarity control flag is set when a data word is inverted. Data is selectively inverted according the corresponding polarity flag when being read from the M virtual pages. A number of the highest threshold voltage programming states in reduced. This provides tighter distribution of programmed cell threshold voltage, reduced power consumption, reduced programming time, and enhanced device reliability.