MBC Transistor Channel Blocking for Tunable Drive Current
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Solution Overview
Problem
Existing methods for forming multi-bridge-channel (MBC) transistors are not satisfactory in all aspects, particularly in modulating effective resistance, capacitance, and drive current, which are crucial for advanced semiconductor devices.
Innovation Solution
A method involving the formation of blocking features after inner spacer features to selectively shut off channel members, modulating the effective resistance, capacitance, or drive current of MBC transistors, by using a blocking feature formation process that electrically isolates specific channel members, allowing for the creation of transistors with similar dimensions but different effective channel widths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If existing methods for forming MBC transistors are used, then the basic transistor structure is formed, but the effective resistance, capacitance, and drive current cannot be adequately modulated
Solution Approach 1:
The patent segments the channel region into multiple independent channel members (first channel member, second channel member, third channel member) that can be selectively activated or deactivated. By forming blocking features between these segmented channel members, the invention enables independent control of each channel's electrical properties, allowing modulation of effective resistance, capacitance, and drive current while maintaining a systematic fabrication approach.
Solution Approach 2:
The patent applies local quality by forming blocking features (such as dielectric layers or doped regions) at specific locations between channel members. These localized structures selectively isolate certain channel members from source/drain regions while leaving others connected, thereby creating transistors with tailored electrical characteristics in different regions of the same device structure.
2Adaptability or versatility
If blocking features are formed to electrically isolate specific channel members, then transistors with different effective channel widths can be created, but the fabrication process complexity increases
Solution Approach 1:
The patent employs preliminary action by forming blocking features before completing the source/drain region formation. This sequencing allows the blocking structures to be established as part of the channel definition process, and subsequent source/drain formation automatically respects these pre-established boundaries, reducing the need for additional isolation steps.
Solution Approach 2:
The blocking features serve multiple functions: they electrically isolate channel members, define effective channel widths, and act as part of the overall transistor structure during subsequent processing steps. This multi-functionality reduces the need for separate structures dedicated to each function, thereby managing fabrication complexity.
3Power
If multiple channel members are wrapped around by a gate structure to increase effective channel width, then drive current performance improves, but the ability to modulate effective resistance and capacitance is limited
Solution Approach 1:
The patent segments the multi-channel structure into independently controllable units by introducing blocking features between channel members. Each channel member remains wrapped by the gate structure for high drive current, but the blocking features allow selective electrical isolation, enabling modulation of effective resistance and capacitance by controlling which channel members are active.
Solution Approach 2:
The patent introduces dynamic control by enabling the electrical state of channel members to be changed. Through the blocking features, channel members can be selectively connected or isolated from source/drain regions, allowing the transistor to dynamically adjust its effective resistance, capacitance, and drive current characteristics based on operational requirements.
Data Source
AI summary
The present disclosure provides semiconductor devices and methods of forming the same. A semiconductor device of the present disclosure includes a first source/drain feature and a second source/drain feature over a substrate, a plurality of channel members extending between the first source/drain feature and the second source/drain feature, a gate structure wrapping around each of the plurality of channel members, and at least one blocking feature. At least one of the plurality of channel members is isolated from the first source/drain feature and the second source/drain feature by the at least one blocking feature.