MBCFET Gate Structure With Epitaxial Sidewall Penetration

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Solution Overview

Problem

In the manufacturing of multi-bridge channel field effect transistors (MBCFETs), the removal of sacrificial layers can leave residues on the source/drain layers, deteriorating their interface characteristics and leading to increased leakage current and reduced control of the gate structure over the channels.

Innovation Solution

A semiconductor device design where a gate structure is formed with protruding sidewalls that penetrate through a portion of the epitaxial layer but do not contact the higher impurity concentration layer, enhancing the interface characteristics of the source/drain layers and reducing leakage current by increasing the length of the gate structure in contact with the source/drain layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sacrificial layers are removed to form gaps for gate structure, then gate structure can be formed to control channels, but residue of sacrificial layers remains on source/drain layer surfaces deteriorating interface characteristics

Engineering Contradiction:
Improveinterface characteristicsVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by forming a cleaning layer before the gate structure is assembled. This cleaning layer is deposited on the source/drain layers prior to placing the gate structure, ensuring that any residue from sacrificial layer removal is eliminated beforehand. The cleaning layer is then removed after serving its protective function, leaving a clean interface between the gate structure and source/drain layers, thus preventing leakage current while maintaining reliable interface characteristics.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cleaning layer acts as an intermediary substance that temporarily protects the source/drain layers during the gate structure formation process. It mediates between the harmful residue and the gate structure by providing a barrier that prevents direct contact between residue and the interface, thereby eliminating the harmful effect of residue without affecting the final interface quality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If gate structure is formed to fill gaps between channels, then control over channels is improved, but complexity of manufacturing process increases due to multiple stacking and removal steps

Engineering Contradiction:
Improvegate controlVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate structure is segmented into multiple functional layers including the cleaning layer, gate electrode layer, and insulating layers. This segmentation allows each layer to perform its specific function independently - the cleaning layer removes residue, the insulating layers provide electrical isolation, and the gate electrode provides control. This modular approach simplifies the manufacturing process by allowing each layer to be formed and optimized separately, reducing the overall complexity despite the multi-step process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes parameter changes in the form of different materials and properties for each layer of the gate structure. By selecting materials with specific properties (e.g., high-k dielectric materials for insulating layers, conductive materials for gate electrode), the manufacturing process is optimized for each function. The cleaning layer uses materials that can be selectively deposited and removed, changing the process parameters to achieve clean interfaces without complicating the overall manufacturing.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12261220B2Semiconductor devices and methods of manufacturing the same
Publication Date: 2025.03.25 SAMSUNG ELECTRONICS CO LTD
  • US12261220B2 patent drawing
  • US12261220B2 patent drawing
  • US12261220B2 patent drawing

AI summary

A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are stacked in a vertical direction. Each channel extends in a first direction. The gate structure extends in a second direction. The gate structure covers the channels. The source/drain layer is connected to each of opposite sidewalls in the first direction of the channels on the substrate, and includes a doped semiconductor material. The source/drain layer includes first and second epitaxial layers having first and second impurity concentrations, respectively. The first epitaxial layer covers a lower surface and opposite sidewalls in the first direction of the second epitaxial layer. A portion of each of opposite sidewalls in the first direction of the gate structure protrudes in the first direction from opposite sidewalls in the first direction of the channels to partially penetrate through the first epitaxial layer but not to contact the second epitaxial layer.