MBCFET Gate Structure Layout for Cleaner Source/Drain Interfaces

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Solution Overview

Problem

In the manufacturing of multi-bridge channel field effect transistors (MBCFETs), the removal of sacrificial layers can lead to residue on the source/drain layers, deteriorating their interface characteristics and affecting the device's performance.

Innovation Solution

A semiconductor device design where a gate structure is formed with protruding sidewalls that extend through a portion of the epitaxial layer but do not contact the higher impurity concentration layer, enhancing the interface characteristics of the source/drain layers and reducing leakage current by increasing the length of the gate structure in contact with the source/drain layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If sacrificial layers are removed to form gaps for gate structure, then gate structure can be formed properly, but residue of sacrificial layers remains on source/drain layer surfaces deteriorating interface characteristics

Engineering Contradiction:
Improvegate structure formationVSAvoidsource/drain layer interface characteristics
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

A cleaning layer is formed on the source/drain layer surface before removing the sacrificial layer. This preliminary action ensures that when the sacrificial layer is removed, the cleaning layer prevents residue from contaminating the source/drain layer surface, thus maintaining interface characteristics while allowing proper gate structure formation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cleaning layer acts as an intermediary between the source/drain layer and the sacrificial layer. It provides a protective interface that prevents direct contact and potential contamination between these layers during the manufacturing process, ensuring clean interfaces after sacrificial layer removal.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Strength

If gate structure sidewalls contact the second epitaxial layer, then structural support is provided, but leakage current increases

Engineering Contradiction:
Improvegate structure supportVSAvoidleakage current
Core Design Contradiction:
StrengthVSObject-generated harmful factors

Solution Approach 1:

The gate structure is designed with different sidewall configurations at different locations. The first sidewalls extend through the first epitaxial layer to contact the second epitaxial layer for structural support, while the second sidewalls stop within the first epitaxial layer to avoid contact with the second epitaxial layer, preventing leakage current. This local differentiation resolves the contradiction between needing support and avoiding leakage.

Inventive Principle:
Principle #3Local quality

3Object-generated harmful factors

If gate structure sidewalls do not contact the second epitaxial layer, then leakage current is reduced, but structural support is compromised

Engineering Contradiction:
Improveleakage current reductionVSAvoidgate structure support
Core Design Contradiction:
Object-generated harmful factorsVSStrength

Solution Approach 1:

The gate structure employs asymmetric sidewall design where first sidewalls provide structural support by contacting the second epitaxial layer, while second sidewalls maintain electrical isolation by stopping within the first epitaxial layer. This localized functional differentiation allows the gate structure to simultaneously achieve both mechanical support and leakage current reduction.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution improves the interface characteristics of the source/drain layers and reduces leakage current, while maintaining the high impurity concentration support for channel current and stress, thereby enhancing the overall performance of the semiconductor device.

Implementation Method 1

a first epitaxial layer covering a lower surface of the second epitaxial layer and covering first and second sidewalls in the first direction of the second epitaxial layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS11955556B2Semiconductor devices and methods of manufacturing the same
Publication Date: 2024.04.09 SAMSUNG ELECTRONICS CO LTD
  • US11955556B2 patent drawing
  • US11955556B2 patent drawing
  • US11955556B2 patent drawing

AI summary

A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are stacked in a vertical direction. Each channel extends in a first direction. The gate structure extends in a second direction. The gate structure covers the channels. The source/drain layer is connected to each of opposite sidewalls in the first direction of the channels on the substrate, and includes a doped semiconductor material. The source/drain layer includes first and second epitaxial layers having first and second impurity concentrations, respectively. The first epitaxial layer covers a lower surface and opposite sidewalls in the first direction of the second epitaxial layer. A portion of each of opposite sidewalls in the first direction of the gate structure protrudes in the first direction from opposite sidewalls in the first direction of the channels to partially penetrate through the first epitaxial layer but not to contact the second epitaxial layer.