Fin-Shaped and Nanosheet MBCFET Structure for Short-Channel Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in scaling integrated circuit density and suppressing short channel effects while maintaining effective current control, particularly in multi-gate transistors with fin-shaped or nanowire structures.
Innovation Solution
The semiconductor device incorporates a Multi-Bridge Channel Field Effect Transistor (MBCFET) design featuring a substrate with multiple nanosheets and a fin-shaped pattern, surrounded by gate electrodes with varying gate insulating layers, allowing for simplified fabrication and enhanced current control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-gate transistors with fin-shaped or nanowire structures are used to increase integrated circuit density, then scaling capability is improved, but fabrication complexity increases
Solution Approach 1:
The device is divided into distinct functional regions: a fin-shaped pattern region and a nanosheet region, each with optimized structures. The fin-shaped pattern provides a first active channel while nanosheets provide additional parallel channels, segmenting the current conduction paths to achieve high density without requiring entirely new fabrication approaches for the entire device
Solution Approach 2:
The patent combines fin-shaped pattern structures with nanosheet structures in a single device, merging the advantages of both architectures. The gate electrode structure is designed to wrap around both fin and nanosheet regions, creating a unified multi-gate device that leverages the vertical control of fins and the high surface-area-to-volume ratio of nanosheets
2Reliability
If gate length is increased to improve current control capability, then current control is improved, but device area increases
Solution Approach 1:
The patent transitions from planar gate control to three-dimensional multi-gate control by forming gates that wrap around the fin and nanosheet channels. This vertical and lateral gating approach provides enhanced electrostatic control without increasing the horizontal gate length, effectively utilizing the third dimension to improve current control while maintaining compact footprint
3Ease of manufacture
If conventional transistor structures are used to simplify fabrication, then fabrication process is simplified, but short channel effects are not effectively suppressed
Solution Approach 1:
The device employs a composite structural approach, integrating fin-shaped semiconductor regions with suspended nanosheet channels. This composite architecture provides enhanced electrostatic control over the channel to suppress short channel effects while maintaining compatibility with established semiconductor fabrication processes that can form both fin and nanosheet structures
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes a substrate, a first active pattern extending in a first direction on the substrate, a second active pattern extending in the first direction on the substrate, the second active pattern spaced apart from the first active pattern in a second direction intersecting the first direction, a plurality of nanosheets spaced apart from each other in a third direction perpendicular to the first direction and the second direction on the first active pattern, a fin-shaped pattern spaced apart from the plurality of nanosheets in the second direction, the fin-shaped pattern comprising a first portion and a second portion. A gate electrode is extending in the second direction on the first and second active patterns, the gate electrode at least partially surrounding each of the plurality of nanosheets and the fin-shaped pattern.