Memory Built-In Self-Test Circuitry Dual Access Paths
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory protection systems in data processing systems are limited in their ability to correct multiple bit errors, leading to potential data corruption due to undetected soft errors, and existing memory built-in self-test methods often disrupt system operations and performance during testing.
Innovation Solution
The implementation of memory built-in self-test circuitry that provides both indirect and direct test access paths to memory, bypassing memory protection circuitry, allowing for autonomous and minimally invasive testing of memory protection circuitry and enabling memory scrubbing to correct soft errors without significant impact on system performance or power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory built-in self-test circuitry performs traditional testing methods, then memory protection circuitry can be tested, but system operations are disrupted and performance is degraded
Solution Approach 1:
The patent introduces a dual access path architecture where MBIST circuitry can access memory through two separate paths: (1) an indirect path through the memory protection circuitry for functional testing, and (2) a direct path bypassing the protection circuitry for low-intrusion testing. This intermediary structure allows testing to proceed while minimizing disruption to system operations, as the direct path enables testing without requiring the memory to be fully taken offline.
Solution Approach 2:
The system dynamically switches between different testing modes based on operational requirements. The MBIST controller can selectively activate indirect testing when system performance must be maintained, or direct testing when comprehensive protection circuitry validation is needed. This dynamic approach allows the system to adapt testing intensity to current operational demands, resolving the contradiction between thorough testing and system productivity.
2Reliability
If memory protection circuitry is tested using existing methods, then errors can be detected, but testing complexity and invasiveness increase
Solution Approach 1:
The MBIST circuitry is designed with multi-functionality to handle both indirect testing (through protection circuitry) and direct testing (bypassing protection circuitry). This universal testing infrastructure can adapt to different testing scenarios without requiring separate dedicated circuits for each testing mode, thereby reducing overall testing infrastructure complexity while maintaining comprehensive error detection capability.
3Reliability
If memory scrubbing is implemented to correct soft errors, then data integrity is improved, but power consumption and area increase
Solution Approach 1:
The memory scrubbing function is implemented as a periodic background operation rather than a continuous process. The MBIST controller periodically reads memory contents, checks for soft errors using the protection circuitry, and corrects detected errors. This periodic approach maintains data integrity through regular scrubbing while allowing the system to operate normally between scrubbing cycles, thereby significantly reducing average power consumption compared to continuous scrubbing.
Data Source
AI summary
A data processing apparatus includes a memory and memory protection circuitry for providing an operational path to the memory during operational use of the memory. A memory built-in self-test controller 34 performs built-in self-test operations upon the memory using either an indirect test access path to the memory via the memory protection circuitry or a direct test access path to the memory which bypasses the memory protection circuitry. Thus, the correct operation of the memory protection circuitry itself can be tested in addition to the correct operation of the memory.