MBIST Error Injection for Diagnostic Validation
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Solution Overview
Problem
System integrators face challenges in validating diagnostic action software for memory built-in-self test (MBIST) failures since they lack access to defective memory blocks during software development, making it difficult to ensure the proper operation of diagnostic actions.
Innovation Solution
The implementation of an error injection mechanism that allows for simulating storage faults in memory blocks during MBIST operations, enabling the validation of diagnostic action software and error recovery processes by introducing errors into the data stored in memory blocks, which are then corrected by the system, thereby validating the software's functionality without requiring an actual faulty memory block.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a system integrator develops diagnostic action software without access to defective memory blocks, then software development can proceed normally, but the software cannot be fully validated for proper operation
Solution Approach 1:
The patent applies preliminary action by injecting errors into the memory block before the MBIST test is executed. This allows the diagnostic action software to be validated with simulated faults present during testing, rather than requiring actual defective memory blocks. The error injection mechanism prepares the test environment in advance with controlled defects, enabling comprehensive software validation while maintaining normal development workflows.
Solution Approach 2:
The patent introduces an error injection mechanism as an intermediary component between the test system and the memory block. This intermediary device simulates storage faults by injecting errors into the memory, allowing the diagnostic action software to be tested without requiring physically defective memory blocks. The error injector acts as a mediator that creates controlled fault conditions for validation purposes.
2Measurement precision
If actual defective memory blocks are used for validation, then software validation accuracy is improved, but access to defective blocks is not available during software development
Solution Approach 1:
The patent applies the copying principle by creating simulated copies of defective memory conditions through error injection. Instead of requiring actual defective memory blocks, the system injects controlled errors that replicate the behavior of real defects. This allows multiple validation scenarios to be tested using the same physical memory block, significantly improving adaptability and availability of test samples while maintaining validation accuracy.
Solution Approach 2:
The patent changes the parameters of the memory block by injecting specific errors at controlled locations and times. Rather than relying on the random and unavailable nature of actual defective blocks, the system modifies the memory state parameters dynamically to create known fault conditions. This enables precise control over test scenarios while maintaining high validation accuracy.
3Reliability
If error injection is implemented to simulate faults, then validation capability is improved, but additional complexity is introduced to the test system
Solution Approach 1:
The patent applies self-service by integrating the error injection functionality directly into the existing MBIST circuitry. The error injector is implemented using available memory circuit elements, allowing the system to perform self-validation without requiring external complex testing equipment. The memory block essentially tests itself by injecting and detecting errors through its own internal resources, minimizing additional system complexity.
Data Source
AI summary
A memory built in self test (MBIST) controller of an MBIST circuit outputs first data. One or more errors is injected in the first data to produce second data. The second data is stored in the memory block. The memory block outputs the second data stored in the memory block. The MBIST controller receives the second data and detects an error in the second data based on a comparison with the first data, the error indicative of a failure of the MBIST. The MBIST controller provides an indication of failure of the MBIST to a processing core external to the MBIST circuit which performs diagnostic action in response to receiving the indication of failure of the MBIST. The processing core validates implementation of the diagnostic action.