MBIST Miscompare Logging with Centralized Fault Aggregation

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Solution Overview

Problem

Conventional built-in self-test (BIST) engines for memory devices are unable to efficiently log and report specific failures during memory testing, lacking the capability to identify which MBIST engine, algorithm, or memory instance failed, and require manual, labor-intensive processes for diagnostics, which are costly and inefficient.

Innovation Solution

An enhanced MBIST system with a single-fault error capture unit (SFCU) that encodes fault bit positions and addresses, and a Fault and Report Collection Unit (FRCU) for centralized logging and aggregation of miscompares, allowing for automated and cost-effective failure diagnosis during volume manufacturing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If conventional BIST engines are used for memory testing, then memory devices can be tested, but they are unable to efficiently log and report specific failures, requiring manual labor-intensive processes for diagnostics

Engineering Contradiction:
Improvefailure diagnosis capabilityVSAvoidtesting system complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The memory device performs self-diagnosis through the SFCU and FRCU units that automatically capture, encode, log, and aggregate failure information during BIST operations, eliminating the need for external manual diagnostic procedures and enabling the device to report its own failures with specific error locations and types

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The SFCU acts as an intermediary component between the BIST engine and the external testing system, capturing and encoding failure information in a structured format, while the FRCU serves as a central repository that aggregates data from multiple sources, providing a standardized interface for failure reporting

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If manual diagnostic processes are used for memory failures, then specific failure information can be obtained, but the process is labor-intensive and costly

Engineering Contradiction:
Improvefailure identification accuracyVSAvoiddiagnostic time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The SFCU captures and encodes failure information in real-time during the BIST process, and the FRCU pre-aggregates this data before external testing, so that when failures need to be analyzed, the information is already organized and ready, eliminating the need for time-consuming manual diagnostic procedures

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system provides immediate feedback about memory failures through automated logging and aggregation, with the FRCU collecting and organizing failure data that can be quickly retrieved and analyzed, creating a closed-loop system that continuously monitors and reports memory health status

Inventive Principle:
Principle #23Feedback

3Loss of information

If detailed failure information is logged for each miscompare, then comprehensive diagnostic data is available, but the logging and aggregation process becomes more complex

Engineering Contradiction:
Improvefailure information completenessVSAvoidlogging system complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The SFCU encodes failure information by transforming raw miscompare data into structured parameters including error location, error type, and syndrome information, while the FRCU aggregates these parameters in a standardized format, converting complex unstructured failure data into organized, analyzable information without requiring complex logging infrastructure

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11869616B2Centrally logging and aggregating miscompares on chip during memory test
Publication Date: 2024.01.09 INFINEON TECHNOLOGIES AMERICAS CORP
  • US11869616B2 patent drawing
  • US11869616B2 patent drawing
  • US11869616B2 patent drawing

AI summary

A system and method for centrally logging and aggregating miscompares on chip during a memory test. The method includes performing, by a built-in self-test (BIST) unit of a memory device, a memory test on one or more memory banks of the memory device using a first algorithm. The method includes generating miscompare results responsive to performing the memory test on the one or more memory banks of the memory device. The method includes determining failure diagnostic information based on the miscompare results. The method includes generating an error packet comprising the failure diagnostic information and the miscompare results. The method includes placing the error packet in a queue of a plurality of error packets to generate a queued error packet.